[PATCH] D104471: [llvm][sve] Lowering for VLS truncating stores

[David Truby via Phabricator via llvm-commits]

DavidTruby updated this revision to Diff 356747.
DavidTruby added a comment.

Renamed R600 target hook and added check for LegalOperations.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104471/new/

https://reviews.llvm.org/D104471

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AMDGPU/R600ISelLowering.h
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-trunc-stores.ll
  llvm/test/CodeGen/Mips/cconv/byval.ll
  llvm/test/CodeGen/Mips/cconv/vector.ll
  llvm/test/CodeGen/Mips/llvm-ir/store.ll
  llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll

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