[PATCH] D105417: [RISCV] Teach RISCVMatInt about cases where it can use LUI+SLLI to replace LUI+ADDI+SLLI for large constants.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 4 19:44:33 PDT 2021


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If we need to shift left anyway we might be able to take advantage
of LUI implicitly shifting its immediate left by 12 to cover part
of the shift. This allows us to use more bits of the LUI immediate
to avoid an ADDI.

I believe this is the same or similar to one of the optimizations
from D79492 <https://reviews.llvm.org/D79492>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105417

Files:
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
  llvm/test/CodeGen/RISCV/add-before-shl.ll
  llvm/test/CodeGen/RISCV/double-mem.ll
  llvm/test/CodeGen/RISCV/float-mem.ll
  llvm/test/CodeGen/RISCV/half-mem.ll
  llvm/test/CodeGen/RISCV/imm.ll
  llvm/test/CodeGen/RISCV/rv64-large-stack.ll
  llvm/test/CodeGen/RISCV/rv64zbp.ll
  llvm/test/CodeGen/RISCV/rvv/constant-folding.ll
  llvm/test/CodeGen/RISCV/urem-lkk.ll
  llvm/test/MC/RISCV/rv64i-aliases-valid.s

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