[PATCH] D105277: [AArch64] Use custom lowering for fp16 vector copysign.
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 2 02:18:11 PDT 2021
fhahn added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1397
// But we do support custom-lowering for FCOPYSIGN.
+ if (VT == MVT::v2f32 || VT == MVT::v4f32 || VT == MVT::v2f64 ||
----------------
dmgreen wrote:
> Whitespace :)
Thanks, I'll fix the formatting in the committed version. I'll also update the cost-model test for vector copysign.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105277/new/
https://reviews.llvm.org/D105277
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