[PATCH] D103955: [MCA] Use LSU for the in-order pipeline

[Dave Green via Phabricator via llvm-commits]

dmgreen added a subscriber: NickGuy.
dmgreen added inline comments.


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Comment at: llvm/test/tools/llvm-mca/AArch64/Cortex/A55-load-store-noalias.s:95-96
+
+# CHECK:      [0,0]     DeeeE.    ..   str	x1, [x10]
+# CHECK-NEXT: [0,1]     .DeeeE    ..   str	x1, [x10]
+# CHECK-NEXT: [0,2]     .DeeE.    ..   ldr	x2, [x10]
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I think I would expect most CPU's to work like this, whether the addresses alias or not :)


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  https://reviews.llvm.org/D103955/new/

https://reviews.llvm.org/D103955