[PATCH] D104000: GlobalISel: Use LLT in memory legality queries

[Amara Emerson via Phabricator via llvm-commits]

aemerson added a comment.

Why did the AArch64 tests change?



================
Comment at: llvm/lib/Target/ARM/ARMInstructionSelector.cpp:1099-1116
-    if (ValSize == 1 && NewOpc == Opcodes.STORE8) {
-      // Before storing a 1-bit value, make sure to clear out any unneeded bits.
-      Register OriginalValue = I.getOperand(0).getReg();
-
-      Register ValueToStore = MRI.createVirtualRegister(&ARM::GPRRegClass);
-      I.getOperand(0).setReg(ValueToStore);
-
----------------
?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104000/new/

https://reviews.llvm.org/D104000