[PATCH] D100167: [AIX] Adjust CSR order to avoid breaking ABI regarding traceback
Kai Luo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 30 01:51:58 PDT 2021
lkail added inline comments.
================
Comment at: llvm/test/CodeGen/PowerPC/aix-csr-alloc.ll:8
+define i32 @g(i32 %a, i32 %b) {
+; AIX-64: AllocationOrder(G8RC_and_G8RC_NOX0) = [ $x3 $x4 $x5 $x6 $x7 $x8 $x9 $x10 $x11 $x12 $x31 $x30 $x29 $x28 $x27 $x26 $x25 $x24 $x23 $x22 $x21 $x20 $x19 $x18 $x17 $x16 $x15 $x14 ]
+; AIX-64: AllocationOrder(G8RC) = [ $x3 $x4 $x5 $x6 $x7 $x8 $x9 $x10 $x11 $x12 $x0 $x31 $x30 $x29 $x28 $x27 $x26 $x25 $x24 $x23 $x22 $x21 $x20 $x19 $x18 $x17 $x16 $x15 $x14 ]
----------------
shchenz wrote:
> In the allocation order definition, `$x2` is allocatable, but here we don't have it. Maybe we can also use `$x2` on AIX like what we did for ELF? Yeah, this should be not related to this patch, we can do it in another follow-up.
```
// Always reserve r2 on AIX for now.
// TODO: Make r2 allocatable on AIX/XCOFF for some leaf functions.
if (Subtarget.isAIXABI())
markSuperRegs(Reserved, PPC::R2); // System-reserved register
```
Looks so, good point.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100167/new/
https://reviews.llvm.org/D100167
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