[PATCH] D100167: [AIX] Adjust CSR order to avoid breaking ABI regarding traceback

[ChenZheng via Phabricator via llvm-commits]

shchenz added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCSubtarget.h:421
+      return 2;
+    return 0;
+  }
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Can we use 0 here? 0 is not a valid allocation order index in the td file?


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Comment at: llvm/test/CodeGen/PowerPC/aix-csr-alloc.ll:8
+define i32 @g(i32 %a, i32 %b) {
+; AIX-64: AllocationOrder(G8RC_and_G8RC_NOX0) = [ $x3 $x4 $x5 $x6 $x7 $x8 $x9 $x10 $x11 $x12 $x31 $x30 $x29 $x28 $x27 $x26 $x25 $x24 $x23 $x22 $x21 $x20 $x19 $x18 $x17 $x16 $x15 $x14 ]
+; AIX-64: AllocationOrder(G8RC) = [ $x3 $x4 $x5 $x6 $x7 $x8 $x9 $x10 $x11 $x12 $x0 $x31 $x30 $x29 $x28 $x27 $x26 $x25 $x24 $x23 $x22 $x21 $x20 $x19 $x18 $x17 $x16 $x15 $x14 ]
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In the allocation order definition, `$x2` is allocatable, but here we don't have it. Maybe we can also use `$x2` on AIX like what we did for ELF? Yeah, this should be not related to this patch, we can do it in another follow-up.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D100167/new/

https://reviews.llvm.org/D100167