[PATCH] D104974: [doc]Added examples for generic opcodes

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/docs/GlobalISel/GenericOpcode.rst:730
+.. code-block:: none
+  G_BR %bb.1
+
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aemerson wrote:
> pooja2299 wrote:
> > xgupta wrote:
> > > why 1 not 0 or 2?
> > Since other Generic opcodes had examples with mentioning specific registers,  I also took an example similar to that . For eg: the example of G_PHI
> >why 1 not 0 or 2?
> We actually begin our block numbering at 1.
This isn't true, there's just currently some oddity that ends up emitting an extra block in IRTranslator


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  https://reviews.llvm.org/D104974/new/

https://reviews.llvm.org/D104974