[PATCH] D104974: [doc]Added examples for generic opcodes
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 29 16:08:15 PDT 2021
aemerson added inline comments.
================
Comment at: llvm/docs/GlobalISel/GenericOpcode.rst:730
+.. code-block:: none
+ G_BR %bb.1
+
----------------
pooja2299 wrote:
> xgupta wrote:
> > why 1 not 0 or 2?
> Since other Generic opcodes had examples with mentioning specific registers, I also took an example similar to that . For eg: the example of G_PHI
>why 1 not 0 or 2?
We actually begin our block numbering at 1.
================
Comment at: llvm/docs/GlobalISel/GenericOpcode.rst:738
+.. code-block:: none
+ G_BRCOND %4, %bb.1
+
----------------
xgupta wrote:
> Why 4 not 3 or 5 or maybe 0?
I suggest %cond or %condition for this
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https://reviews.llvm.org/D104974/new/
https://reviews.llvm.org/D104974
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