[PATCH] D105033: [TableGen] Allow identical MnemonicAliases with no predicate
Nicolas Guillemot via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 28 09:04:37 PDT 2021
nlguillemot added a comment.
In the code sample in the description, is it supposed to be `Feature_Subtarget2Bit` for the second "if"?
One thing I'm wondering is, how about defining the MnemonicAlias just once outside the multiclass? Like this:
defm FooInst1 : DefInstruction<"foo", (outs), (ins), Subtarget1>;
defm FooInst2 : DefInstruction<"foo", (outs), (ins), Subtarget2>;
def : MnemonicAlias<"foo_alias", "foo">;
Otherwise if the MnemonicAlias is in the multiclass then there are two virtually identical MnemonicAliases being defined right?
I think that generally speaking it makes sense to avoid letting users use duplicate inputs since that might help catch errors in some cases. On the other hand I can see the practical utility in allowing duplicates when it comes to working with multiclasses. I'm not sure, thoughts?
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https://reviews.llvm.org/D105033/new/
https://reviews.llvm.org/D105033
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