[PATCH] D105016: [TargetLowering][AArch64][SVE] Take into account accessed type when clamping address

Bradley Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 28 05:48:33 PDT 2021


bsmith created this revision.
bsmith added reviewers: paulwalker-arm, peterwaller-arm, david-arm.
Herald added subscribers: psnobl, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: efriedma.
bsmith requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

When clamping the index for a memory access to a stacked vector we must
take into account the entire type being accessed, not just assume that
we are accessing only a single element.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105016

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/split-vector-insert.ll
  llvm/test/CodeGen/AArch64/sve-extract-vector.ll
  llvm/test/CodeGen/AArch64/sve-insert-vector.ll

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