[PATCH] D104974: [doc]Added examples for generic opcodes

Sun Jun 27 00:31:48 PDT 2021

pooja2299 added a comment.

In D104974#2842785 <https://reviews.llvm.org/D104974#2842785>, @xgupta wrote:

> I would suggest you to take your full time, understand Global Machine IR thoroughly i.e. know the meaning of every letter in the testcases from where you taken these examples.  And then write //more// descriptive Opcode docs something like as LLVM IR instruction reference https://llvm.org/docs/LangRef.html#instruction-reference.

Ok will do that . Since there are short descriptions provided for the Generic opcodes, I thought I have to write short descriptions.

================
Comment at: llvm/docs/GlobalISel/GenericOpcode.rst:730
+.. code-block:: none
+  G_BR %bb.1
+
----------------
xgupta wrote:
> why 1 not 0 or 2?
Since other Generic opcodes had examples with mentioning specific registers,  I also took an example similar to that . For eg: the example of G_PHI

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D104974/new/

https://reviews.llvm.org/D104974