[PATCH] D104974: [doc]Added examples for generic opcodes

[Shivam Gupta via Phabricator via llvm-commits]

xgupta added a comment.

I would suggest you to take your full time, understand Global Machine IR thoroughly i.e. know the meaning of every letter in the testcases from where you taken these examples.  And then write //more// descriptive Opcode docs something like as LLVM IR instruction reference https://llvm.org/docs/LangRef.html#instruction-reference.



================
Comment at: llvm/docs/GlobalISel/GenericOpcode.rst:730
+.. code-block:: none
+  G_BR %bb.1
+
----------------
why 1 not 0 or 2?


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Comment at: llvm/docs/GlobalISel/GenericOpcode.rst:738
+.. code-block:: none
+  G_BRCOND %4, %bb.1
+
----------------
Why 4 not 3 or 5 or maybe 0?


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https://reviews.llvm.org/D104974