[llvm] 8a9ec39 - [Hexagon] Convert getTypeAlignment to return Align

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 25 08:53:33 PDT 2021


Author: Krzysztof Parzyszek
Date: 2021-06-25T10:53:14-05:00
New Revision: 8a9ec39bd02fb05621ac4e68b50a6ca0f722ccd2

URL: https://github.com/llvm/llvm-project/commit/8a9ec39bd02fb05621ac4e68b50a6ca0f722ccd2
DIFF: https://github.com/llvm/llvm-project/commit/8a9ec39bd02fb05621ac4e68b50a6ca0f722ccd2.diff

LOG: [Hexagon] Convert getTypeAlignment to return Align

Plus some minor related changes of the same nature.

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    llvm/lib/Target/Hexagon/HexagonISelLowering.h
    llvm/lib/Target/Hexagon/HexagonSubtarget.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index f156482cdcc72..7126977a00f6d 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -1913,19 +1913,20 @@ const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {
 }
 
 void
-HexagonTargetLowering::validateConstPtrAlignment(SDValue Ptr, const SDLoc &dl,
-      unsigned NeedAlign) const {
+HexagonTargetLowering::validateConstPtrAlignment(SDValue Ptr, Align NeedAlign,
+      const SDLoc &dl) const {
   auto *CA = dyn_cast<ConstantSDNode>(Ptr);
   if (!CA)
     return;
   unsigned Addr = CA->getZExtValue();
-  unsigned HaveAlign = Addr != 0 ? 1u << countTrailingZeros(Addr) : NeedAlign;
+  Align HaveAlign =
+      Addr != 0 ? Align(1u << countTrailingZeros(Addr)) : NeedAlign;
   if (HaveAlign < NeedAlign) {
     std::string ErrMsg;
     raw_string_ostream O(ErrMsg);
     O << "Misaligned constant address: " << format_hex(Addr, 10)
-      << " has alignment " << HaveAlign
-      << ", but the memory access requires " << NeedAlign;
+      << " has alignment " << HaveAlign.value()
+      << ", but the memory access requires " << NeedAlign.value();
     if (DebugLoc DL = dl.getDebugLoc())
       DL.print(O << ", at ");
     report_fatal_error(O.str());
@@ -2900,8 +2901,8 @@ HexagonTargetLowering::LowerLoad(SDValue Op, SelectionDAG &DAG) const {
     LN = cast<LoadSDNode>(NL.getNode());
   }
 
-  unsigned ClaimAlign = LN->getAlignment();
-  validateConstPtrAlignment(LN->getBasePtr(), dl, ClaimAlign);
+  Align ClaimAlign = LN->getAlign();
+  validateConstPtrAlignment(LN->getBasePtr(), ClaimAlign, dl);
   // Call LowerUnalignedLoad for all loads, it recognizes loads that
   // don't need extra aligning.
   SDValue LU = LowerUnalignedLoad(SDValue(LN, 0), DAG);
@@ -2932,12 +2933,11 @@ HexagonTargetLowering::LowerStore(SDValue Op, SelectionDAG &DAG) const {
     SN = cast<StoreSDNode>(NS.getNode());
   }
 
-  unsigned ClaimAlign = SN->getAlignment();
-  SDValue Ptr = SN->getBasePtr();
-  validateConstPtrAlignment(Ptr, dl, ClaimAlign);
+  Align ClaimAlign = SN->getAlign();
+  validateConstPtrAlignment(SN->getBasePtr(), ClaimAlign, dl);
 
   MVT StoreTy = SN->getMemoryVT().getSimpleVT();
-  unsigned NeedAlign = Subtarget.getTypeAlignment(StoreTy);
+  Align NeedAlign = Subtarget.getTypeAlignment(StoreTy);
   if (ClaimAlign < NeedAlign)
     return expandUnalignedStore(SN, DAG);
   return SDValue(SN, 0);
@@ -2948,8 +2948,8 @@ HexagonTargetLowering::LowerUnalignedLoad(SDValue Op, SelectionDAG &DAG)
       const {
   LoadSDNode *LN = cast<LoadSDNode>(Op.getNode());
   MVT LoadTy = ty(Op);
-  unsigned NeedAlign = Subtarget.getTypeAlignment(LoadTy);
-  unsigned HaveAlign = LN->getAlignment();
+  unsigned NeedAlign = Subtarget.getTypeAlignment(LoadTy).value();
+  unsigned HaveAlign = LN->getAlign().value();
   if (HaveAlign >= NeedAlign)
     return Op;
 

diff  --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
index 84c4355927b2e..2e8d78d91859a 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
@@ -341,8 +341,8 @@ class HexagonTargetLowering : public TargetLowering {
   void initializeHVXLowering();
   unsigned getPreferredHvxVectorAction(MVT VecTy) const;
 
-  void validateConstPtrAlignment(SDValue Ptr, const SDLoc &dl,
-                                 unsigned NeedAlign) const;
+  void validateConstPtrAlignment(SDValue Ptr, Align NeedAlign,
+                                 const SDLoc &dl) const;
 
   std::pair<SDValue,int> getBaseAndOffset(SDValue Addr) const;
 

diff  --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.h b/llvm/lib/Target/Hexagon/HexagonSubtarget.h
index 5d5a3c48858f4..a4f2e159bf4bb 100644
--- a/llvm/lib/Target/Hexagon/HexagonSubtarget.h
+++ b/llvm/lib/Target/Hexagon/HexagonSubtarget.h
@@ -24,6 +24,7 @@
 #include "llvm/CodeGen/ScheduleDAGMutation.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/MC/MCInstrItineraries.h"
+#include "llvm/Support/Alignment.h"
 #include <memory>
 #include <string>
 #include <vector>
@@ -288,10 +289,10 @@ class HexagonSubtarget : public HexagonGenSubtargetInfo {
   bool isHVXVectorType(MVT VecTy, bool IncludeBool = false) const;
   bool isTypeForHVX(Type *VecTy, bool IncludeBool = false) const;
 
-  unsigned getTypeAlignment(MVT Ty) const {
+  Align getTypeAlignment(MVT Ty) const {
     if (isHVXVectorType(Ty, true))
-      return getVectorLength();
-    return Ty.getSizeInBits() / 8;
+      return Align(getVectorLength());
+    return Align(std::max<unsigned>(1, Ty.getSizeInBits() / 8));
   }
 
   unsigned getL1CacheLineSize() const;


        


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