[PATCH] D104782: [AArch64] Custom lower <4 x i8> loads

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I don't really care either way...



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4497
+  SDNode::use_iterator UI = Op.getNode()->use_begin();
+  if (UI->getOpcode() == ISD::EXTRACT_VECTOR_ELT && Op->hasOneUse())
+    return SDValue();
----------------
`Op.hasOneUse()` is very different from `Op->hasOneUse()`.


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  https://reviews.llvm.org/D104782/new/

https://reviews.llvm.org/D104782