[PATCH] D104264: Fix atomic loads and stores of 64-bit values in non-default address spaces on ARM

[Renato Golin via Phabricator via llvm-commits]

rengolin added a comment.

In D104264#2833385 <https://reviews.llvm.org/D104264#2833385>, @theraven wrote:

> Back ends are expected to crash when given invalid IR.

Well, we could make the crash more meaningful with an assert, but yeah, crash.

If we decide to do anything, it will be covered in the bug I opened.

This review can be closed.

Thanks for bringing this to our attention.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104264/new/

https://reviews.llvm.org/D104264