[PATCH] D104701: [ARMInstPrinter] Print the target address of a branch instruction

Peter Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 22 07:29:52 PDT 2021


peter.smith added a comment.

In D104701#2833053 <https://reviews.llvm.org/D104701#2833053>, @peter.smith wrote:

> In D104701#2832919 <https://reviews.llvm.org/D104701#2832919>, @ikudrin wrote:
>
>> @peter.smith, the patch helped me to spot a couple of suspicious places:
>>
>> - In `lld/test/ELF/arm-fix-cortex-a8-blx.s`, the target address in the patch points to `<_start+0x4>` while the initial code targets `<_start>`;
>> - In `lld/test/ELF/arm-thumb-interwork-thunk.s`, there are check blocks that are not validated, `CHECK-PI-ARM-PLT` and `CHECK-PI-THUMB-PLT`. It looks like they were not checked from the very beginning.
>>
>> Could you possibly take a look?
>
> I can give it a try. Now on my todo list. I'll have to do this in my spare time so it may take a few days.

There's a couple of things wrong with the unrelocated BLX case in the LLD code (test lld/test/ELF/arm-fix-cortex-a8-blx.s). To the best of my knowledge nothing generates unrelocated BLX instructions so this shouldn't affect any real world program. However it still should be fixed. I'll try and do that in the next couple of days.

- In getThumbDestAddr when the instruction is a BLX we should set `sourceAddr = alignDown(sourceAddr, 4);`
- in writeTo `p = getVA(4)` should be `p = getVA(isBLX(instr) ? 8 : 4);` As the patch for a BLX is Arm state and the pc-offset for Arm is 8 and not 4. This accounts for the incorrect start + 0x4.


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