[PATCH] D104575: AMDGPU: Try to eliminate clearing of high bits of 16-bit instructions

Tue Jun 22 07:10:55 PDT 2021

arsenm added a comment.

In D104575#2833149 <https://reviews.llvm.org/D104575#2833149>, @foad wrote:

> In D104575#2833135 <https://reviews.llvm.org/D104575#2833135>, @arsenm wrote:
>
>> In D104575#2832652 <https://reviews.llvm.org/D104575#2832652>, @foad wrote:
>>
>>> Looks reasonable to me. I guess there's no way to do this as a DAGCombine instead?
>>
>> You would need to know exactly how the source node is going to be selected, which you can't know ahead of time We do approximate this for FP instructions already.
>
> I was wondering if combines could be run on the MachineSDNodes immediately after selection. But I see there is nothing like that.

I think there is a post-processing hook in the selector, but the instructions would be a bit off since SIFixSGPRCopies wouldn't have run yet, and there could be more intermediate nodes. Plus why sink effort into a DAG only solution at this point

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https://reviews.llvm.org/D104575