[PATCH] D103800: [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:3455
+    // before 160b/192b/224b types were directly supported.
+    if (ActualAddrSize == 8 && (ExpectedAddrSize == 5 ||
+                                ExpectedAddrSize == 6 || ExpectedAddrSize == 7))
----------------
A shorter variant would probably fit in one line:


```
ExpectedAddrSize >= 5 && ExpectedAddrSize <= 7
```


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1938
+  if (BitWidth <= 224)
+    return &AMDGPU::AReg_192RegClass;
   if (BitWidth <= 256)
----------------
typo


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1962
+  if (BitWidth <= 224)
+    return &AMDGPU::AReg_192_Align2RegClass;
   if (BitWidth <= 256)
----------------
ditto


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103800/new/

https://reviews.llvm.org/D103800