[llvm] acefe0e - [Mem2Reg] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 21 02:06:38 PDT 2021
Author: Nikita Popov
Date: 2021-06-21T11:06:28+02:00
New Revision: acefe0eaaf82c1d31a8d12e15751118eb40fe637
URL: https://github.com/llvm/llvm-project/commit/acefe0eaaf82c1d31a8d12e15751118eb40fe637
DIFF: https://github.com/llvm/llvm-project/commit/acefe0eaaf82c1d31a8d12e15751118eb40fe637.diff
LOG: [Mem2Reg] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll
llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll
llvm/test/Transforms/Mem2Reg/pr24179.ll
llvm/test/Transforms/Mem2Reg/undef-order.ll
llvm/test/Transforms/SROA/phi-and-select.ll
llvm/test/Transforms/SROA/pr37267.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll b/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll
index 6a2419c03e437..283c27e7b2985 100644
--- a/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll
+++ b/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -mem2reg -S | FileCheck %s
; Testing conversion from dbg.declare to dbg.value when the variable is a VLA.
@@ -14,21 +15,25 @@ target triple = "x86_64-apple-macosx10.12.0"
; Function Attrs: nounwind ssp uwtable
define void @scan() #0 !dbg !4 {
+; CHECK-LABEL: @scan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG10:![0-9]+]]
+; CHECK: for.cond:
+; CHECK-NEXT: [[VLA1_0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[T0:%.*]], [[FOR_COND]] ]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 [[VLA1_0]], metadata [[META11:![0-9]+]], metadata !DIExpression()), !dbg [[DBG19:![0-9]+]]
+; CHECK-NEXT: [[T0]] = add i32 [[VLA1_0]], 1
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 [[T0]], metadata [[META11]], metadata !DIExpression()), !dbg [[DBG19]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG10]]
+;
entry:
%vla1 = alloca i32, i32 1, align 8
call void @llvm.dbg.declare(metadata i32* %vla1, metadata !10, metadata !DIExpression()), !dbg !18
br label %for.cond, !dbg !18
for.cond: ; preds = %for.cond, %entry
-; CHECK: %[[PHI:.*]] = phi i32 [ undef, %entry ], [ %t0, %for.cond ]
%entryN = load i32, i32* %vla1, align 8, !dbg !18
-; CHECK: call void @llvm.dbg.value(metadata i32 %[[PHI]],
-; CHECK-SAME: metadata !DIExpression())
%t0 = add i32 %entryN, 1
-; CHECK: %t0 = add i32 %[[PHI]], 1
-; CHECK: call void @llvm.dbg.value(metadata i32 %t0,
-; CHECK-SAME: metadata !DIExpression())
- store i32 %t0, i32* %vla1, align 8, !dbg !18
+ store i32 %t0, i32* %vla1, align 8, !dbg !18
br label %for.cond, !dbg !18
}
diff --git a/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll b/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll
index 0d7d2e34c813f..8b2bc128b0f97 100644
--- a/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll
+++ b/llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -mem2reg -S | FileCheck %s
; Testing conversion from dbg.declare to dbg.value when the variable is a VLA.
@@ -17,20 +18,24 @@ target triple = "x86_64-apple-macosx10.12.0"
; Function Attrs: nounwind ssp uwtable
define void @scan(i32 %n) #0 !dbg !4 {
+; CHECK-LABEL: @scan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG10:![0-9]+]]
+; CHECK: for.cond:
+; CHECK-NEXT: [[VLA1_0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[T0:%.*]], [[FOR_COND]] ]
+; CHECK-NEXT: [[T0]] = add i32 [[VLA1_0]], 1
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 undef, metadata [[META11:![0-9]+]], metadata !DIExpression()), !dbg [[DBG19:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG10]]
+;
entry:
%vla1 = alloca i32, i32 %n, align 8
call void @llvm.dbg.declare(metadata i32* %vla1, metadata !10, metadata !DIExpression()), !dbg !18
br label %for.cond, !dbg !18
for.cond: ; preds = %for.cond, %entry
-; CHECK: %[[PHI:.*]] = phi i32 [ undef, %entry ], [ %t0, %for.cond ]
%entryN = load i32, i32* %vla1, align 8, !dbg !18
-; CHECK-NOT: call void @llvm.dbg.value
%t0 = add i32 %entryN, 1
-; CHECK: %t0 = add i32 %[[PHI]], 1
-; CHECK: call void @llvm.dbg.value(metadata i32 undef,
-; CHECK-SAME: metadata !DIExpression())
- store i32 %t0, i32* %vla1, align 8, !dbg !18
+ store i32 %t0, i32* %vla1, align 8, !dbg !18
br label %for.cond, !dbg !18
}
diff --git a/llvm/test/Transforms/Mem2Reg/pr24179.ll b/llvm/test/Transforms/Mem2Reg/pr24179.ll
index 72a9e61938d77..8df27c86a59ec 100644
--- a/llvm/test/Transforms/Mem2Reg/pr24179.ll
+++ b/llvm/test/Transforms/Mem2Reg/pr24179.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -mem2reg < %s -S | FileCheck %s
; RUN: opt -passes=mem2reg < %s -S | FileCheck %s
@@ -9,20 +10,28 @@ declare i1 @use(i32)
; and a PHI node to be created.
define void @test1() {
; CHECK-LABEL: @test1(
- entry:
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[T_0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[N:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[C:%.*]] = call i1 @use(i32 [[T_0]])
+; CHECK-NEXT: [[N]] = call i32 @def(i32 7)
+; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+ entry:
%t = alloca i32
br label %loop
- loop:
+ loop:
%v = load i32, i32* %t
%c = call i1 @use(i32 %v)
-; CHECK: [[PHI:%.*]] = phi i32 [ undef, %entry ], [ %n, %loop ]
-; CHECK: call i1 @use(i32 [[PHI]])
%n = call i32 @def(i32 7)
store i32 %n, i32* %t
br i1 %c, label %loop, label %exit
- exit:
+ exit:
ret void
}
@@ -30,16 +39,23 @@ define void @test1() {
; replaced with an undef
define void @test2() {
; CHECK-LABEL: @test2(
- entry:
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[C:%.*]] = call i1 @use(i32 undef)
+; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+ entry:
%t = alloca i32
br label %loop
- loop:
+ loop:
%v = load i32, i32* %t
%c = call i1 @use(i32 %v)
-; CHECK: %c = call i1 @use(i32 undef)
br i1 %c, label %loop, label %exit
- exit:
+ exit:
ret void
}
diff --git a/llvm/test/Transforms/Mem2Reg/undef-order.ll b/llvm/test/Transforms/Mem2Reg/undef-order.ll
index 09687518c8724..7642456a9da44 100644
--- a/llvm/test/Transforms/Mem2Reg/undef-order.ll
+++ b/llvm/test/Transforms/Mem2Reg/undef-order.ll
@@ -1,53 +1,97 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
;RUN: opt -mem2reg -S < %s | FileCheck %s
declare i1 @cond()
define i32 @foo() {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT: Entry:
+; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
+; CHECK-NEXT: br i1 [[C1]], label [[STORE1:%.*]], label [[STORE2:%.*]]
+; CHECK: Block1:
+; CHECK-NEXT: br label [[JOIN:%.*]]
+; CHECK: Block2:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block3:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block4:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block5:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Store1:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block6:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block7:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block8:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block9:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block10:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Store2:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block11:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block12:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block13:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block14:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block15:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Block16:
+; CHECK-NEXT: br label [[JOIN]]
+; CHECK: Join:
+; CHECK-NEXT: [[VAL_0:%.*]] = phi i32 [ 1, [[STORE1]] ], [ 2, [[STORE2]] ], [ undef, [[BLOCK1:%.*]] ], [ undef, [[BLOCK2:%.*]] ], [ undef, [[BLOCK3:%.*]] ], [ undef, [[BLOCK4:%.*]] ], [ undef, [[BLOCK5:%.*]] ], [ undef, [[BLOCK6:%.*]] ], [ undef, [[BLOCK7:%.*]] ], [ undef, [[BLOCK8:%.*]] ], [ undef, [[BLOCK9:%.*]] ], [ undef, [[BLOCK10:%.*]] ], [ undef, [[BLOCK11:%.*]] ], [ undef, [[BLOCK12:%.*]] ], [ undef, [[BLOCK13:%.*]] ], [ undef, [[BLOCK14:%.*]] ], [ undef, [[BLOCK15:%.*]] ], [ undef, [[BLOCK16:%.*]] ]
+; CHECK-NEXT: ret i32 [[VAL_0]]
+;
Entry:
- %val = alloca i32
- %c1 = call i1 @cond()
- br i1 %c1, label %Store1, label %Store2
+ %val = alloca i32
+ %c1 = call i1 @cond()
+ br i1 %c1, label %Store1, label %Store2
Block1:
- br label %Join
+ br label %Join
Block2:
- br label %Join
+ br label %Join
Block3:
- br label %Join
+ br label %Join
Block4:
- br label %Join
+ br label %Join
Block5:
- br label %Join
+ br label %Join
Store1:
- store i32 1, i32* %val
- br label %Join
+ store i32 1, i32* %val
+ br label %Join
Block6:
- br label %Join
+ br label %Join
Block7:
- br label %Join
+ br label %Join
Block8:
- br label %Join
+ br label %Join
Block9:
- br label %Join
+ br label %Join
Block10:
- br label %Join
+ br label %Join
Store2:
- store i32 2, i32* %val
- br label %Join
+ store i32 2, i32* %val
+ br label %Join
Block11:
- br label %Join
+ br label %Join
Block12:
- br label %Join
+ br label %Join
Block13:
- br label %Join
+ br label %Join
Block14:
- br label %Join
+ br label %Join
Block15:
- br label %Join
+ br label %Join
Block16:
- br label %Join
+ br label %Join
Join:
; Phi inserted here should have operands appended deterministically
-; CHECK: %val.0 = phi i32 [ 1, %Store1 ], [ 2, %Store2 ], [ undef, %Block1 ], [ undef, %Block2 ], [ undef, %Block3 ], [ undef, %Block4 ], [ undef, %Block5 ], [ undef, %Block6 ], [ undef, %Block7 ], [ undef, %Block8 ], [ undef, %Block9 ], [ undef, %Block10 ], [ undef, %Block11 ], [ undef, %Block12 ], [ undef, %Block13 ], [ undef, %Block14 ], [ undef, %Block15 ], [ undef, %Block16 ]
- %result = load i32, i32* %val
- ret i32 %result
+ %result = load i32, i32* %val
+ ret i32 %result
}
diff --git a/llvm/test/Transforms/SROA/phi-and-select.ll b/llvm/test/Transforms/SROA/phi-and-select.ll
index 8f04e3df13f9a..c773714981359 100644
--- a/llvm/test/Transforms/SROA/phi-and-select.ll
+++ b/llvm/test/Transforms/SROA/phi-and-select.ll
@@ -1,70 +1,83 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -sroa -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
define i32 @test1() {
; CHECK-LABEL: @test1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[COND:%.*]] = icmp sle i32 0, 1
+; CHECK-NEXT: br i1 [[COND]], label [[THEN:%.*]], label [[EXIT:%.*]]
+; CHECK: then:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[PHI_SROA_SPECULATED:%.*]] = phi i32 [ 1, [[THEN]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[PHI_SROA_SPECULATED]]
+;
entry:
- %a = alloca [2 x i32]
-; CHECK-NOT: alloca
+ %a = alloca [2 x i32]
%a0 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 0
%a1 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 1
- store i32 0, i32* %a0
- store i32 1, i32* %a1
- %v0 = load i32, i32* %a0
- %v1 = load i32, i32* %a1
-; CHECK-NOT: store
-; CHECK-NOT: load
+ store i32 0, i32* %a0
+ store i32 1, i32* %a1
+ %v0 = load i32, i32* %a0
+ %v1 = load i32, i32* %a1
- %cond = icmp sle i32 %v0, %v1
- br i1 %cond, label %then, label %exit
+ %cond = icmp sle i32 %v0, %v1
+ br i1 %cond, label %then, label %exit
then:
- br label %exit
+ br label %exit
exit:
- %phi = phi i32* [ %a1, %then ], [ %a0, %entry ]
-; CHECK: phi i32 [ 1, %{{.*}} ], [ 0, %{{.*}} ]
+ %phi = phi i32* [ %a1, %then ], [ %a0, %entry ]
- %result = load i32, i32* %phi
- ret i32 %result
+ %result = load i32, i32* %phi
+ ret i32 %result
}
define i32 @test2() {
; CHECK-LABEL: @test2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[COND:%.*]] = icmp sle i32 0, 1
+; CHECK-NEXT: [[RESULT_SROA_SPECULATED:%.*]] = select i1 [[COND]], i32 1, i32 0
+; CHECK-NEXT: ret i32 [[RESULT_SROA_SPECULATED]]
+;
entry:
- %a = alloca [2 x i32]
-; CHECK-NOT: alloca
+ %a = alloca [2 x i32]
%a0 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 0
%a1 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 1
- store i32 0, i32* %a0
- store i32 1, i32* %a1
- %v0 = load i32, i32* %a0
- %v1 = load i32, i32* %a1
-; CHECK-NOT: store
-; CHECK-NOT: load
-
- %cond = icmp sle i32 %v0, %v1
- %select = select i1 %cond, i32* %a1, i32* %a0
-; CHECK: select i1 %{{.*}}, i32 1, i32 0
-
- %result = load i32, i32* %select
- ret i32 %result
+ store i32 0, i32* %a0
+ store i32 1, i32* %a1
+ %v0 = load i32, i32* %a0
+ %v1 = load i32, i32* %a1
+
+ %cond = icmp sle i32 %v0, %v1
+ %select = select i1 %cond, i32* %a1, i32* %a0
+
+ %result = load i32, i32* %select
+ ret i32 %result
}
; If bitcast isn't considered a safe phi/select use, the alloca
; remains as an array.
; FIXME: Why isn't this identical to test2?
-
-; CHECK-LABEL: @test2_bitcast(
-; CHECK: alloca i32
-; CHECK-NEXT: alloca i32
-
-; CHECK: %select = select i1 %cond, i32* %a.sroa.3, i32* %a.sroa.0
-; CHECK-NEXT: %select.bc = bitcast i32* %select to float*
-; CHECK-NEXT: %result = load float, float* %select.bc, align 4
define float @test2_bitcast() {
+; CHECK-LABEL: @test2_bitcast(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[A_SROA_3:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i32 0, i32* [[A_SROA_0]], align 4
+; CHECK-NEXT: store i32 1, i32* [[A_SROA_3]], align 4
+; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_V0:%.*]] = load i32, i32* [[A_SROA_0]], align 4
+; CHECK-NEXT: [[A_SROA_3_0_A_SROA_3_4_V1:%.*]] = load i32, i32* [[A_SROA_3]], align 4
+; CHECK-NEXT: [[COND:%.*]] = icmp sle i32 [[A_SROA_0_0_A_SROA_0_0_V0]], [[A_SROA_3_0_A_SROA_3_4_V1]]
+; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i32* [[A_SROA_3]], i32* [[A_SROA_0]]
+; CHECK-NEXT: [[SELECT_BC:%.*]] = bitcast i32* [[SELECT]] to float*
+; CHECK-NEXT: [[RESULT:%.*]] = load float, float* [[SELECT_BC]], align 4
+; CHECK-NEXT: ret float [[RESULT]]
+;
entry:
%a = alloca [2 x i32]
%a0 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 0
@@ -80,14 +93,21 @@ entry:
ret float %result
}
-; CHECK-LABEL: @test2_addrspacecast(
-; CHECK: alloca i32
-; CHECK-NEXT: alloca i32
-
-; CHECK: %select = select i1 %cond, i32* %a.sroa.3, i32* %a.sroa.0
-; CHECK-NEXT: %select.asc = addrspacecast i32* %select to i32 addrspace(1)*
-; CHECK-NEXT: load i32, i32 addrspace(1)* %select.asc, align 4
define i32 @test2_addrspacecast() {
+; CHECK-LABEL: @test2_addrspacecast(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[A_SROA_3:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i32 0, i32* [[A_SROA_0]], align 4
+; CHECK-NEXT: store i32 1, i32* [[A_SROA_3]], align 4
+; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_V0:%.*]] = load i32, i32* [[A_SROA_0]], align 4
+; CHECK-NEXT: [[A_SROA_3_0_A_SROA_3_4_V1:%.*]] = load i32, i32* [[A_SROA_3]], align 4
+; CHECK-NEXT: [[COND:%.*]] = icmp sle i32 [[A_SROA_0_0_A_SROA_0_0_V0]], [[A_SROA_3_0_A_SROA_3_4_V1]]
+; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i32* [[A_SROA_3]], i32* [[A_SROA_0]]
+; CHECK-NEXT: [[SELECT_ASC:%.*]] = addrspacecast i32* [[SELECT]] to i32 addrspace(1)*
+; CHECK-NEXT: [[RESULT:%.*]] = load i32, i32 addrspace(1)* [[SELECT_ASC]], align 4
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
entry:
%a = alloca [2 x i32]
%a0 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 0
@@ -105,9 +125,38 @@ entry:
define i32 @test3(i32 %x) {
; CHECK-LABEL: @test3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: switch i32 [[X:%.*]], label [[BB0:%.*]] [
+; CHECK-NEXT: i32 1, label [[BB1:%.*]]
+; CHECK-NEXT: i32 2, label [[BB2:%.*]]
+; CHECK-NEXT: i32 3, label [[BB3:%.*]]
+; CHECK-NEXT: i32 4, label [[BB4:%.*]]
+; CHECK-NEXT: i32 5, label [[BB5:%.*]]
+; CHECK-NEXT: i32 6, label [[BB6:%.*]]
+; CHECK-NEXT: i32 7, label [[BB7:%.*]]
+; CHECK-NEXT: ]
+; CHECK: bb0:
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: bb2:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: bb3:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: bb4:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: bb5:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: bb6:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: bb7:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[PHI_SROA_SPECULATED:%.*]] = phi i32 [ 1, [[BB0]] ], [ 0, [[BB1]] ], [ 0, [[BB2]] ], [ 1, [[BB3]] ], [ 1, [[BB4]] ], [ 0, [[BB5]] ], [ 0, [[BB6]] ], [ 1, [[BB7]] ]
+; CHECK-NEXT: ret i32 [[PHI_SROA_SPECULATED]]
+;
entry:
- %a = alloca [2 x i32]
-; CHECK-NOT: alloca
+ %a = alloca [2 x i32]
; Note that we build redundant GEPs here to ensure that having
diff erent GEPs
; into the same alloca partation continues to work with PHI speculation. This
@@ -116,124 +165,128 @@ entry:
%a0b = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 0
%a1 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 1
%a1b = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 1
- store i32 0, i32* %a0
- store i32 1, i32* %a1
-; CHECK-NOT: store
+ store i32 0, i32* %a0
+ store i32 1, i32* %a1
switch i32 %x, label %bb0 [ i32 1, label %bb1
- i32 2, label %bb2
- i32 3, label %bb3
- i32 4, label %bb4
- i32 5, label %bb5
- i32 6, label %bb6
- i32 7, label %bb7 ]
+ i32 2, label %bb2
+ i32 3, label %bb3
+ i32 4, label %bb4
+ i32 5, label %bb5
+ i32 6, label %bb6
+ i32 7, label %bb7 ]
bb0:
- br label %exit
+ br label %exit
bb1:
- br label %exit
+ br label %exit
bb2:
- br label %exit
+ br label %exit
bb3:
- br label %exit
+ br label %exit
bb4:
- br label %exit
+ br label %exit
bb5:
- br label %exit
+ br label %exit
bb6:
- br label %exit
+ br label %exit
bb7:
- br label %exit
+ br label %exit
exit:
- %phi = phi i32* [ %a1, %bb0 ], [ %a0, %bb1 ], [ %a0, %bb2 ], [ %a1, %bb3 ],
- [ %a1b, %bb4 ], [ %a0b, %bb5 ], [ %a0b, %bb6 ], [ %a1b, %bb7 ]
-; CHECK: phi i32 [ 1, %{{.*}} ], [ 0, %{{.*}} ], [ 0, %{{.*}} ], [ 1, %{{.*}} ], [ 1, %{{.*}} ], [ 0, %{{.*}} ], [ 0, %{{.*}} ], [ 1, %{{.*}} ]
+ %phi = phi i32* [ %a1, %bb0 ], [ %a0, %bb1 ], [ %a0, %bb2 ], [ %a1, %bb3 ],
+ [ %a1b, %bb4 ], [ %a0b, %bb5 ], [ %a0b, %bb6 ], [ %a1b, %bb7 ]
- %result = load i32, i32* %phi
- ret i32 %result
+ %result = load i32, i32* %phi
+ ret i32 %result
}
define i32 @test4() {
; CHECK-LABEL: @test4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i32 0
+;
entry:
- %a = alloca [2 x i32]
-; CHECK-NOT: alloca
+ %a = alloca [2 x i32]
%a0 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 0
%a1 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 1
- store i32 0, i32* %a0
- store i32 1, i32* %a1
- %v0 = load i32, i32* %a0
- %v1 = load i32, i32* %a1
-; CHECK-NOT: store
-; CHECK-NOT: load
-
- %cond = icmp sle i32 %v0, %v1
- %select = select i1 %cond, i32* %a0, i32* %a0
-; CHECK-NOT: select
-
- %result = load i32, i32* %select
- ret i32 %result
-; CHECK: ret i32 0
+ store i32 0, i32* %a0
+ store i32 1, i32* %a1
+ %v0 = load i32, i32* %a0
+ %v1 = load i32, i32* %a1
+
+ %cond = icmp sle i32 %v0, %v1
+ %select = select i1 %cond, i32* %a0, i32* %a0
+
+ %result = load i32, i32* %select
+ ret i32 %result
}
define i32 @test5(i32* %b) {
; CHECK-LABEL: @test5(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i32 1
+;
entry:
- %a = alloca [2 x i32]
-; CHECK-NOT: alloca
+ %a = alloca [2 x i32]
%a1 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 1
- store i32 1, i32* %a1
-; CHECK-NOT: store
+ store i32 1, i32* %a1
- %select = select i1 true, i32* %a1, i32* %b
-; CHECK-NOT: select
+ %select = select i1 true, i32* %a1, i32* %b
- %result = load i32, i32* %select
-; CHECK-NOT: load
+ %result = load i32, i32* %select
- ret i32 %result
-; CHECK: ret i32 1
+ ret i32 %result
}
declare void @f(i32*, i32*)
define i32 @test6(i32* %b) {
; CHECK-LABEL: @test6(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[SELECT2:%.*]] = select i1 false, i32* undef, i32* [[B:%.*]]
+; CHECK-NEXT: [[SELECT3:%.*]] = select i1 false, i32* undef, i32* [[B]]
+; CHECK-NEXT: call void @f(i32* [[SELECT2]], i32* [[SELECT3]])
+; CHECK-NEXT: ret i32 1
+;
entry:
- %a = alloca [2 x i32]
+ %a = alloca [2 x i32]
%c = alloca i32
-; CHECK-NOT: alloca
%a1 = getelementptr [2 x i32], [2 x i32]* %a, i64 0, i32 1
- store i32 1, i32* %a1
+ store i32 1, i32* %a1
- %select = select i1 true, i32* %a1, i32* %b
- %select2 = select i1 false, i32* %a1, i32* %b
+ %select = select i1 true, i32* %a1, i32* %b
+ %select2 = select i1 false, i32* %a1, i32* %b
%select3 = select i1 false, i32* %c, i32* %b
-; CHECK: %[[select2:.*]] = select i1 false, i32* undef, i32* %b
-; CHECK: %[[select3:.*]] = select i1 false, i32* undef, i32* %b
; Note, this would potentially escape the alloca pointer except for the
; constant folding of the select.
call void @f(i32* %select2, i32* %select3)
-; CHECK: call void @f(i32* %[[select2]], i32* %[[select3]])
- %result = load i32, i32* %select
-; CHECK-NOT: load
+ %result = load i32, i32* %select
%dead = load i32, i32* %c
- ret i32 %result
-; CHECK: ret i32 1
+ ret i32 %result
}
define i32 @test7() {
; CHECK-LABEL: @test7(
-; CHECK-NOT: alloca
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 undef, label [[GOOD:%.*]], label [[BAD:%.*]]
+; CHECK: good:
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: bad:
+; CHECK-NEXT: [[P_SROA_SPECULATE_LOAD_BAD:%.*]] = load i32, i32* undef, align 4
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[P_SROA_SPECULATED:%.*]] = phi i32 [ 0, [[GOOD]] ], [ [[P_SROA_SPECULATE_LOAD_BAD]], [[BAD]] ]
+; CHECK-NEXT: ret i32 [[P_SROA_SPECULATED]]
+;
entry:
%X = alloca i32
@@ -250,23 +303,27 @@ bad:
br label %exit
exit:
- %P = phi i32* [ %Y1, %good ], [ %Y2, %bad ]
-; CHECK: %[[phi:.*]] = phi i32 [ 0, %good ],
+ %P = phi i32* [ %Y1, %good ], [ %Y2, %bad ]
%Z2 = load i32, i32* %P
ret i32 %Z2
-; CHECK: ret i32 %[[phi]]
}
define i32 @test8(i32 %b, i32* %ptr) {
; Ensure that we rewrite allocas to the used type when that use is hidden by
; a PHI that can be speculated.
; CHECK-LABEL: @test8(
-; CHECK-NOT: alloca
-; CHECK-NOT: load
-; CHECK: %[[value:.*]] = load i32, i32* %ptr
-; CHECK-NOT: load
-; CHECK: %[[result:.*]] = phi i32 [ undef, %else ], [ %[[value]], %then ]
-; CHECK-NEXT: ret i32 %[[result]]
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TEST:%.*]] = icmp ne i32 [[B:%.*]], 0
+; CHECK-NEXT: br i1 [[TEST]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[PHI_SROA_SPECULATE_LOAD_THEN:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: else:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[PHI_SROA_SPECULATED:%.*]] = phi i32 [ undef, [[ELSE]] ], [ [[PHI_SROA_SPECULATE_LOAD_THEN]], [[THEN]] ]
+; CHECK-NEXT: ret i32 [[PHI_SROA_SPECULATED]]
+;
entry:
%f = alloca float
@@ -289,12 +346,13 @@ exit:
define i32 @test9(i32 %b, i32* %ptr) {
; Same as @test8 but for a select rather than a PHI node.
; CHECK-LABEL: @test9(
-; CHECK-NOT: alloca
-; CHECK-NOT: load
-; CHECK: %[[value:.*]] = load i32, i32* %ptr
-; CHECK-NOT: load
-; CHECK: %[[result:.*]] = select i1 %{{.*}}, i32 undef, i32 %[[value]]
-; CHECK-NEXT: ret i32 %[[result]]
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i32 0, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TEST:%.*]] = icmp ne i32 [[B:%.*]], 0
+; CHECK-NEXT: [[LOADED_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[LOADED_SROA_SPECULATED:%.*]] = select i1 [[TEST]], i32 undef, i32 [[LOADED_SROA_SPECULATE_LOAD_FALSE]]
+; CHECK-NEXT: ret i32 [[LOADED_SROA_SPECULATED]]
+;
entry:
%f = alloca float
@@ -311,12 +369,22 @@ define float @test10(i32 %b, float* %ptr) {
; rewriting due to the necessity of inserting bitcasts when speculating a PHI
; node.
; CHECK-LABEL: @test10(
-; CHECK: %[[alloca:.*]] = alloca
-; CHECK: %[[argvalue:.*]] = load float, float* %ptr
-; CHECK: %[[cast:.*]] = bitcast double* %[[alloca]] to float*
-; CHECK: %[[allocavalue:.*]] = load float, float* %[[cast]]
-; CHECK: %[[result:.*]] = phi float [ %[[allocavalue]], %else ], [ %[[argvalue]], %then ]
-; CHECK-NEXT: ret float %[[result]]
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F:%.*]] = alloca double, align 8
+; CHECK-NEXT: store double 0.000000e+00, double* [[F]], align 8
+; CHECK-NEXT: [[TEST:%.*]] = icmp ne i32 [[B:%.*]], 0
+; CHECK-NEXT: br i1 [[TEST]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[PHI_SROA_SPECULATE_LOAD_THEN:%.*]] = load float, float* [[PTR:%.*]], align 4
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: else:
+; CHECK-NEXT: [[F_0_F_0_BITCAST_SROA_CAST:%.*]] = bitcast double* [[F]] to float*
+; CHECK-NEXT: [[F_0_PHI_SROA_SPECULATE_LOAD_ELSE:%.*]] = load float, float* [[F_0_F_0_BITCAST_SROA_CAST]], align 8
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[PHI_SROA_SPECULATED:%.*]] = phi float [ [[F_0_PHI_SROA_SPECULATE_LOAD_ELSE]], [[ELSE]] ], [ [[PHI_SROA_SPECULATE_LOAD_THEN]], [[THEN]] ]
+; CHECK-NEXT: ret float [[PHI_SROA_SPECULATED]]
+;
entry:
%f = alloca double
@@ -340,12 +408,17 @@ exit:
define float @test11(i32 %b, float* %ptr) {
; Same as @test10 but for a select rather than a PHI node.
; CHECK-LABEL: @test11(
-; CHECK: %[[alloca:.*]] = alloca
-; CHECK: %[[cast:.*]] = bitcast double* %[[alloca]] to float*
-; CHECK: %[[allocavalue:.*]] = load float, float* %[[cast]]
-; CHECK: %[[argvalue:.*]] = load float, float* %ptr
-; CHECK: %[[result:.*]] = select i1 %{{.*}}, float %[[allocavalue]], float %[[argvalue]]
-; CHECK-NEXT: ret float %[[result]]
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F:%.*]] = alloca double, align 8
+; CHECK-NEXT: store double 0.000000e+00, double* [[F]], align 8
+; CHECK-NEXT: store float 0.000000e+00, float* [[PTR:%.*]], align 4
+; CHECK-NEXT: [[TEST:%.*]] = icmp ne i32 [[B:%.*]], 0
+; CHECK-NEXT: [[F_0_F_0_BITCAST_SROA_CAST:%.*]] = bitcast double* [[F]] to float*
+; CHECK-NEXT: [[F_0_LOADED_SROA_SPECULATE_LOAD_TRUE:%.*]] = load float, float* [[F_0_F_0_BITCAST_SROA_CAST]], align 8
+; CHECK-NEXT: [[LOADED_SROA_SPECULATE_LOAD_FALSE:%.*]] = load float, float* [[PTR]], align 4
+; CHECK-NEXT: [[LOADED_SROA_SPECULATED:%.*]] = select i1 [[TEST]], float [[F_0_LOADED_SROA_SPECULATE_LOAD_TRUE]], float [[LOADED_SROA_SPECULATE_LOAD_FALSE]]
+; CHECK-NEXT: ret float [[LOADED_SROA_SPECULATED]]
+;
entry:
%f = alloca double
@@ -362,9 +435,9 @@ define i32 @test12(i32 %x, i32* %p) {
; Ensure we don't crash or fail to nuke dead selects of allocas if no load is
; never found.
; CHECK-LABEL: @test12(
-; CHECK-NOT: alloca
-; CHECK-NOT: select
-; CHECK: ret i32 %x
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i32 [[X:%.*]]
+;
entry:
%a = alloca i32
@@ -378,9 +451,13 @@ define i32 @test13(i32 %x, i32* %p) {
; Ensure we don't crash or fail to nuke dead phis of allocas if no load is ever
; found.
; CHECK-LABEL: @test13(
-; CHECK-NOT: alloca
-; CHECK-NOT: phi
-; CHECK: ret i32 %x
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: br i1 undef, label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 [[X:%.*]]
+;
entry:
%a = alloca i32
@@ -401,13 +478,26 @@ define i32 @test14(i1 %b1, i1 %b2, i32* %ptr) {
; speculatable toward promotion but the other is not. That should block all of
; the speculation.
; CHECK-LABEL: @test14(
-; CHECK: alloca
-; CHECK: alloca
-; CHECK: select
-; CHECK: phi
-; CHECK: phi
-; CHECK: select
-; CHECK: ret i32
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[G:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i32 0, i32* [[F]], align 4
+; CHECK-NEXT: store i32 0, i32* [[G]], align 4
+; CHECK-NEXT: [[F_SELECT:%.*]] = select i1 [[B1:%.*]], i32* [[F]], i32* [[PTR:%.*]]
+; CHECK-NEXT: br i1 [[B2:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: else:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[F_PHI:%.*]] = phi i32* [ [[F]], [[THEN]] ], [ [[F_SELECT]], [[ELSE]] ]
+; CHECK-NEXT: [[G_PHI:%.*]] = phi i32* [ [[G]], [[THEN]] ], [ [[PTR]], [[ELSE]] ]
+; CHECK-NEXT: [[F_LOADED:%.*]] = load i32, i32* [[F_PHI]], align 4
+; CHECK-NEXT: [[G_SELECT:%.*]] = select i1 [[B1]], i32* [[G]], i32* [[G_PHI]]
+; CHECK-NEXT: [[G_LOADED:%.*]] = load i32, i32* [[G_SELECT]], align 4
+; CHECK-NEXT: [[RESULT:%.*]] = add i32 [[F_LOADED]], [[G_LOADED]]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
entry:
%f = alloca i32
@@ -437,8 +527,16 @@ define i32 @PR13905() {
; Check a pattern where we have a chain of dead phi nodes to ensure they are
; deleted and promotion can proceed.
; CHECK-LABEL: @PR13905(
-; CHECK-NOT: alloca i32
-; CHECK: ret i32 undef
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 undef, label [[LOOP1:%.*]], label [[EXIT:%.*]]
+; CHECK: loop1:
+; CHECK-NEXT: br i1 undef, label [[LOOP1]], label [[LOOP2:%.*]]
+; CHECK: loop2:
+; CHECK-NEXT: br i1 undef, label [[LOOP1]], label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[PHI2:%.*]] = phi i32* [ undef, [[LOOP2]] ], [ null, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 undef
+;
entry:
%h = alloca i32
@@ -462,7 +560,13 @@ define i32 @PR13906() {
; PHI nodes or select nodes. This triggers subtly
diff erently from the above
; cases because the PHI node is (recursively) alive, but the select is dead.
; CHECK-LABEL: @PR13906(
-; CHECK-NOT: alloca
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[FOR_COND]]
+; CHECK: if.then:
+; CHECK-NEXT: br label [[FOR_COND]]
+;
entry:
%c = alloca i32
@@ -480,6 +584,15 @@ if.then:
define i64 @PR14132(i1 %flag) {
; CHECK-LABEL: @PR14132(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: [[B_0_LOAD_EXT:%.*]] = zext i8 1 to i64
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[PTR_0_SROA_SPECULATED:%.*]] = phi i64 [ [[B_0_LOAD_EXT]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i64 [[PTR_0_SROA_SPECULATED]]
+;
; Here we form a PHI-node by promoting the pointer alloca first, and then in
; order to promote the other two allocas, we speculate the load of the
; now-phi-node-pointer. In doing so we end up loading a 64-bit value from an i8
@@ -491,7 +604,6 @@ entry:
%a = alloca i64, align 8
%b = alloca i8, align 8
%ptr = alloca i64*, align 8
-; CHECK-NOT: alloca
%ptr.cast = bitcast i64** %ptr to i8**
store i64 0, i64* %a, align 8
@@ -502,21 +614,31 @@ entry:
if.then:
store i8* %b, i8** %ptr.cast, align 8
br label %if.end
-; CHECK-NOT: store
-; CHECK: %[[ext:.*]] = zext i8 1 to i64
if.end:
%tmp = load i64*, i64** %ptr, align 8
%result = load i64, i64* %tmp, align 8
-; CHECK-NOT: load
-; CHECK: %[[result:.*]] = phi i64 [ %[[ext]], %if.then ], [ 0, %entry ]
ret i64 %result
-; CHECK-NEXT: ret i64 %[[result]]
}
define float @PR16687(i64 %x, i1 %flag) {
; CHECK-LABEL: @PR16687(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A_SROA_0_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[X:%.*]] to i32
+; CHECK-NEXT: [[A_SROA_2_0_EXTRACT_SHIFT:%.*]] = lshr i64 [[X]], 32
+; CHECK-NEXT: [[A_SROA_2_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[A_SROA_2_0_EXTRACT_SHIFT]] to i32
+; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_SROA_0_0_EXTRACT_TRUNC]] to float
+; CHECK-NEXT: br label [[END:%.*]]
+; CHECK: else:
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[A_SROA_2_0_EXTRACT_TRUNC]] to float
+; CHECK-NEXT: br label [[END]]
+; CHECK: end:
+; CHECK-NEXT: [[A_PHI_F_SROA_SPECULATED:%.*]] = phi float [ [[TMP0]], [[THEN]] ], [ [[TMP1]], [[ELSE]] ]
+; CHECK-NEXT: ret float [[A_PHI_F_SROA_SPECULATED]]
+;
; Check that even when we try to speculate the same phi twice (in two slices)
; on an otherwise promotable construct, we don't get ahead of ourselves and try
; to promote one of the slices prior to speculating it.
@@ -525,31 +647,21 @@ entry:
%a = alloca i64, align 8
store i64 %x, i64* %a
br i1 %flag, label %then, label %else
-; CHECK-NOT: alloca
-; CHECK-NOT: store
-; CHECK: %[[lo:.*]] = trunc i64 %x to i32
-; CHECK: %[[shift:.*]] = lshr i64 %x, 32
-; CHECK: %[[hi:.*]] = trunc i64 %[[shift]] to i32
then:
%a.f = bitcast i64* %a to float*
br label %end
-; CHECK: %[[lo_cast:.*]] = bitcast i32 %[[lo]] to float
else:
%a.raw = bitcast i64* %a to i8*
%a.raw.4 = getelementptr i8, i8* %a.raw, i64 4
%a.raw.4.f = bitcast i8* %a.raw.4 to float*
br label %end
-; CHECK: %[[hi_cast:.*]] = bitcast i32 %[[hi]] to float
end:
%a.phi.f = phi float* [ %a.f, %then ], [ %a.raw.4.f, %else ]
%f = load float, float* %a.phi.f
ret float %f
-; CHECK: %[[phi:.*]] = phi float [ %[[lo_cast]], %then ], [ %[[hi_cast]], %else ]
-; CHECK-NOT: load
-; CHECK: ret float %[[phi]]
}
; Verifies we fixed PR20425. We should be able to promote all alloca's to
@@ -560,9 +672,19 @@ end:
; %2 = phi(%0, %1) // == slice
define float @simplify_phi_nodes_that_equal_slice(i1 %cond, float* %temp) {
; CHECK-LABEL: @simplify_phi_nodes_that_equal_slice(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT: br label [[MERGE:%.*]]
+; CHECK: else:
+; CHECK-NEXT: br label [[MERGE]]
+; CHECK: merge:
+; CHECK-NEXT: [[ARR_SROA_0_0:%.*]] = phi float [ 1.000000e+00, [[THEN]] ], [ 2.000000e+00, [[ELSE]] ]
+; CHECK-NEXT: store float 0.000000e+00, float* [[TEMP:%.*]], align 4
+; CHECK-NEXT: ret float [[ARR_SROA_0_0]]
+;
entry:
%arr = alloca [4 x float], align 4
-; CHECK-NOT: alloca
br i1 %cond, label %then, label %else
then:
@@ -590,9 +712,21 @@ merge:
; %3 = phi(%1, %2) // == slice
define float @simplify_phi_nodes_that_equal_slice_2(i1 %cond, float* %temp) {
; CHECK-LABEL: @simplify_phi_nodes_that_equal_slice_2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT: br label [[THEN2:%.*]]
+; CHECK: then2:
+; CHECK-NEXT: br label [[MERGE:%.*]]
+; CHECK: else:
+; CHECK-NEXT: br label [[MERGE]]
+; CHECK: merge:
+; CHECK-NEXT: [[ARR_SROA_0_0:%.*]] = phi float [ 2.000000e+00, [[THEN2]] ], [ 3.000000e+00, [[ELSE]] ]
+; CHECK-NEXT: store float 0.000000e+00, float* [[TEMP:%.*]], align 4
+; CHECK-NEXT: ret float [[ARR_SROA_0_0]]
+;
entry:
%arr = alloca [4 x float], align 4
-; CHECK-NOT: alloca
br i1 %cond, label %then, label %else
then:
@@ -626,9 +760,25 @@ merge:
; make sure we insert *after* the first non-PHI instruction.
define void @PR20822() {
; CHECK-LABEL: @PR20822(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F_SROA_0:%.*]] = alloca i32, align 4
+; CHECK-NEXT: br i1 undef, label [[IF_END:%.*]], label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ undef, [[FOR_COND]] ]
+; CHECK-NEXT: [[F_SROA_0_0_F2_SROA_CAST1:%.*]] = bitcast i32* [[F_SROA_0]] to %struct.S*
+; CHECK-NEXT: br i1 undef, label [[IF_THEN5:%.*]], label [[IF_THEN2:%.*]]
+; CHECK: if.then2:
+; CHECK-NEXT: br label [[IF_THEN5]]
+; CHECK: if.then5:
+; CHECK-NEXT: [[F1:%.*]] = phi %struct.S* [ undef, [[IF_THEN2]] ], [ [[F_SROA_0_0_F2_SROA_CAST1]], [[IF_END]] ]
+; CHECK-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[F1]], i32 0, i32 0
+; CHECK-NEXT: store i32 undef, i32* [[DOTFCA_0_GEP]], align 4
+; CHECK-NEXT: ret void
+;
entry:
%f = alloca %struct.S, align 4
-; CHECK: %[[alloca:.*]] = alloca
br i1 undef, label %if.end, label %for.cond
for.cond: ; preds = %for.cond, %entry
@@ -636,8 +786,6 @@ for.cond: ; preds = %for.cond, %entry
if.end: ; preds = %for.cond, %entry
%f2 = phi %struct.S* [ %f, %entry ], [ %f, %for.cond ]
-; CHECK: phi i32
-; CHECK: %[[cast:.*]] = bitcast i32* %[[alloca]] to %struct.S*
phi i32 [ undef, %entry ], [ undef, %for.cond ]
br i1 undef, label %if.then5, label %if.then2
@@ -646,28 +794,45 @@ if.then2: ; preds = %if.end
if.then5: ; preds = %if.then2, %if.end
%f1 = phi %struct.S* [ undef, %if.then2 ], [ %f2, %if.end ]
-; CHECK: phi {{.*}} %[[cast]]
store %struct.S undef, %struct.S* %f1, align 4
ret void
}
define i32 @phi_align(i32* %z) {
; CHECK-LABEL: @phi_align(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [7 x i8], align 1
+; CHECK-NEXT: [[A_SROA_0_3_A1_SROA_IDX:%.*]] = getelementptr inbounds [7 x i8], [7 x i8]* [[A_SROA_0]], i64 0, i64 3
+; CHECK-NEXT: [[A_SROA_0_3_A1_SROA_CAST:%.*]] = bitcast i8* [[A_SROA_0_3_A1_SROA_IDX]] to i32*
+; CHECK-NEXT: [[A_SROA_0_0_A0_SROA_CAST:%.*]] = bitcast [7 x i8]* [[A_SROA_0]] to i32*
+; CHECK-NEXT: store i32 0, i32* [[A_SROA_0_0_A0_SROA_CAST]], align 1
+; CHECK-NEXT: [[A_SROA_0_3_A1_SROA_IDX7:%.*]] = getelementptr inbounds [7 x i8], [7 x i8]* [[A_SROA_0]], i64 0, i64 3
+; CHECK-NEXT: [[A_SROA_0_3_A1_SROA_CAST8:%.*]] = bitcast i8* [[A_SROA_0_3_A1_SROA_IDX7]] to i32*
+; CHECK-NEXT: store i32 1, i32* [[A_SROA_0_3_A1_SROA_CAST8]], align 1
+; CHECK-NEXT: [[A_SROA_0_0_A0_SROA_CAST6:%.*]] = bitcast [7 x i8]* [[A_SROA_0]] to i32*
+; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_1_V0:%.*]] = load i32, i32* [[A_SROA_0_0_A0_SROA_CAST6]], align 1
+; CHECK-NEXT: [[A_SROA_0_3_A1_SROA_IDX9:%.*]] = getelementptr inbounds [7 x i8], [7 x i8]* [[A_SROA_0]], i64 0, i64 3
+; CHECK-NEXT: [[A_SROA_0_3_A1_SROA_CAST10:%.*]] = bitcast i8* [[A_SROA_0_3_A1_SROA_IDX9]] to i32*
+; CHECK-NEXT: [[A_SROA_0_3_A_SROA_0_4_V1:%.*]] = load i32, i32* [[A_SROA_0_3_A1_SROA_CAST10]], align 1
+; CHECK-NEXT: [[COND:%.*]] = icmp sle i32 [[A_SROA_0_0_A_SROA_0_1_V0]], [[A_SROA_0_3_A_SROA_0_4_V1]]
+; CHECK-NEXT: br i1 [[COND]], label [[THEN:%.*]], label [[EXIT:%.*]]
+; CHECK: then:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[PHI:%.*]] = phi i32* [ [[A_SROA_0_3_A1_SROA_CAST]], [[THEN]] ], [ [[Z:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[RESULT:%.*]] = load i32, i32* [[PHI]], align 1
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
entry:
%a = alloca [8 x i8], align 8
-; CHECK: alloca [7 x i8]
%a0x = getelementptr [8 x i8], [8 x i8]* %a, i64 0, i32 1
%a0 = bitcast i8* %a0x to i32*
%a1x = getelementptr [8 x i8], [8 x i8]* %a, i64 0, i32 4
%a1 = bitcast i8* %a1x to i32*
-; CHECK: store i32 0, {{.*}}, align 1
store i32 0, i32* %a0, align 1
-; CHECK: store i32 1, {{.*}}, align 1
store i32 1, i32* %a1, align 4
-; CHECK: load {{.*}}, align 1
%v0 = load i32, i32* %a0, align 1
-; CHECK: load {{.*}}, align 1
%v1 = load i32, i32* %a1, align 4
%cond = icmp sle i32 %v0, %v1
br i1 %cond, label %then, label %exit
@@ -676,8 +841,6 @@ then:
br label %exit
exit:
-; CHECK: %phi = phi i32* [ {{.*}}, %then ], [ %z, %entry ]
-; CHECK-NEXT: %result = load i32, i32* %phi, align 1
%phi = phi i32* [ %a1, %then ], [ %z, %entry ]
%result = load i32, i32* %phi, align 4
ret i32 %result
@@ -686,7 +849,13 @@ exit:
; Don't speculate a load based on an earlier volatile operation.
define i8 @volatile_select(i8* %p, i1 %b) {
; CHECK-LABEL: @volatile_select(
-; CHECK: select i1 %b, i8* %p, i8* %p2
+; CHECK-NEXT: [[P2:%.*]] = alloca i8, align 1
+; CHECK-NEXT: store i8 0, i8* [[P2]], align 1
+; CHECK-NEXT: store volatile i8 0, i8* [[P:%.*]], align 1
+; CHECK-NEXT: [[PX:%.*]] = select i1 [[B:%.*]], i8* [[P]], i8* [[P2]]
+; CHECK-NEXT: [[V2:%.*]] = load i8, i8* [[PX]], align 1
+; CHECK-NEXT: ret i8 [[V2]]
+;
%p2 = alloca i8
store i8 0, i8* %p2
store volatile i8 0, i8* %p
diff --git a/llvm/test/Transforms/SROA/pr37267.ll b/llvm/test/Transforms/SROA/pr37267.ll
index 4fcb1f29aac5a..479bf9f7b51a8 100644
--- a/llvm/test/Transforms/SROA/pr37267.ll
+++ b/llvm/test/Transforms/SROA/pr37267.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -sroa -S | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32:64-S128"
target triple = "sparcv9-sun-solaris"
@@ -6,9 +7,11 @@ target triple = "sparcv9-sun-solaris"
; Check that we don't crash on this test.
define i16 @f1() {
-; CHECK-LABEL: @f1
-; CHECK: %[[retval:.*]] = add i16 2, 2
-; CHECK: ret i16 %[[retval]]
+; CHECK-LABEL: @f1(
+; CHECK-NEXT: bb1:
+; CHECK-NEXT: [[RC:%.*]] = add i16 2, 2
+; CHECK-NEXT: ret i16 [[RC]]
+;
bb1:
; This 12-byte alloca is split into partitions as [0,2), [2,4), [4,8), [8,10), [10, 12).
@@ -40,9 +43,18 @@ bb1:
}
define i16 @f2() {
-; CHECK-LABEL: @f2
-; CHECK: %[[retval:.*]] = add i16 2, undef
-; CHECK: ret i16 %[[retval]]
+; CHECK-LABEL: @f2(
+; CHECK-NEXT: bb1:
+; CHECK-NEXT: [[A_3_SROA_2_2_INSERT_EXT:%.*]] = zext i16 undef to i32
+; CHECK-NEXT: [[A_3_SROA_2_2_INSERT_MASK:%.*]] = and i32 undef, -65536
+; CHECK-NEXT: [[A_3_SROA_2_2_INSERT_INSERT:%.*]] = or i32 [[A_3_SROA_2_2_INSERT_MASK]], [[A_3_SROA_2_2_INSERT_EXT]]
+; CHECK-NEXT: [[A_3_SROA_0_2_INSERT_EXT:%.*]] = zext i16 undef to i32
+; CHECK-NEXT: [[A_3_SROA_0_2_INSERT_SHIFT:%.*]] = shl i32 [[A_3_SROA_0_2_INSERT_EXT]], 16
+; CHECK-NEXT: [[A_3_SROA_0_2_INSERT_MASK:%.*]] = and i32 [[A_3_SROA_2_2_INSERT_INSERT]], 65535
+; CHECK-NEXT: [[A_3_SROA_0_2_INSERT_INSERT:%.*]] = or i32 [[A_3_SROA_0_2_INSERT_MASK]], [[A_3_SROA_0_2_INSERT_SHIFT]]
+; CHECK-NEXT: [[RC:%.*]] = add i16 2, undef
+; CHECK-NEXT: ret i16 [[RC]]
+;
bb1:
; This 12-byte alloca is split into partitions as [0,2), [2,4), [4,8), [8,10), [10, 12).
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