[PATCH] D104440: [X86] Fix bug when X86 stackify pass handle one ArgFPRW.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 20 10:01:04 PDT 2021


craig.topper added a comment.

In D104440#2829260 <https://reviews.llvm.org/D104440#2829260>, @LuoYuanke wrote:

> I think because I use the
>
> In D104440#2829221 <https://reviews.llvm.org/D104440#2829221>, @craig.topper wrote:
>
>> In D104440#2829220 <https://reviews.llvm.org/D104440#2829220>, @LuoYuanke wrote:
>>
>>> With -O0, the small case can also generate "IMPLICIT_DEF" and "CHS_Fp80". I think we are near to the root cause. Stay tuned.
>>
>> ProcessImplicitDefs doesn’t run with O0 and FP stackifier has special code for IMPLICIT_DEF.
>
> This is because I set opt-bisect-limit=67436 in my command line. When CurBisectNum expired, "DAG to DAG" pass lower its opt level to O0. However "processimpdefs" and "X86 FP Stackifier" is not stopped due to the CurBisectNum expiration. So undefined fp0 is generated.
>
>   if (OptLevel != CodeGenOpt::None && skipFunction(Fn))
>     NewOptLevel = CodeGenOpt::None;
>   OptLevelChanger OLC(*this, NewOptLevel);

Does this fix your test

  diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
  index 44670a9..3e5d45b 100644
  --- a/llvm/lib/Target/X86/X86FastISel.cpp
  +++ b/llvm/lib/Target/X86/X86FastISel.cpp
  @@ -3842,6 +3842,30 @@ unsigned X86FastISel::fastMaterializeConstant(const Constant *C) {
       return X86MaterializeFP(CFP, VT);
     else if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
       return X86MaterializeGV(GV, VT);
  +  else if (isa<UndefValue>(C)) {
  +    unsigned Opc = 0;
  +    switch (VT.SimpleTy) {
  +    default:
  +      break;
  +    case MVT::f32:
  +      if (!X86ScalarSSEf32)
  +        Opc = X86::LD_Fp032;
  +      break;
  +    case MVT::f64:
  +      if (!X86ScalarSSEf64)
  +        Opc = X86::LD_Fp064;
  +      break;
  +    case MVT::f80:
  +      Opc = X86::LD_Fp080;
  +      break;
  +    }
  +
  +    if (Opc) {
  +      Register ResultReg = createResultReg(TLI.getRegClassFor(VT));
  +      BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg);
  +      return ResultReg;
  +    }
  +  }
   
     return 0;
   }


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