[PATCH] D104440: [X86] Fix bug when X86 stackify pass handle one ArgFPRW.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added a comment.

In D104440#2825925 <https://reviews.llvm.org/D104440#2825925>, @craig.topper wrote:

> How did you get a CHS with an undef input?

I got the MIR from a big application which is built with LTO.


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https://reviews.llvm.org/D104440