[PATCH] D101469: [RISCV] Enable interleaved vectorization for RVV
Luke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 16 01:21:40 PDT 2021
luke957 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h:173
+
+ bool enableInterleavedAccessVectorization() { return true; }
+ unsigned getMaxInterleaveFactor(unsigned VF) {
----------------
craig.topper wrote:
> craig.topper wrote:
> > I think these are two different features.
> >
> > enableInterleavedAccessVectorization is for memory accesses that are interlaved.
> >
> > getMaxInterleaveFactor controls loop unrolling in the vectorizer.
> >
> > Which feature were you trying to enable?
> I think enableInterleavedAccessVectorization reads extra data and uses shuffles to extract the elements that are needed.
Yes, bool enableInterleavedAccessVectorization() should not be added here. I'll restore the code and submit a new patch.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D101469/new/
https://reviews.llvm.org/D101469
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