[llvm] 3710997 - [AMDGPU] Use defvar in SOPInstructions.td. NFC.
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 16 01:17:06 PDT 2021
Author: Jay Foad
Date: 2021-06-16T09:16:45+01:00
New Revision: 37109974af4b33189a599735afa67ed57c27b8ab
URL: https://github.com/llvm/llvm-project/commit/37109974af4b33189a599735afa67ed57c27b8ab
DIFF: https://github.com/llvm/llvm-project/commit/37109974af4b33189a599735afa67ed57c27b8ab.diff
LOG: [AMDGPU] Use defvar in SOPInstructions.td. NFC.
Factor out repeated !cast<SOP*_Pseudo>(NAME) into a new "defvar ps",
just to improve readability and maintainability.
Differential Revision: https://reviews.llvm.org/D104306
Added:
Modified:
llvm/lib/Target/AMDGPU/SOPInstructions.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index 175e9043b5b20..33eaf9f090bcc 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -1443,8 +1443,9 @@ class Select_gfx6_gfx7<string opName> : SIMCInstr<opName, SIEncodingFamily.SI> {
//===----------------------------------------------------------------------===//
multiclass SOP1_Real_gfx10<bits<8> op> {
- def _gfx10 : SOP1_Real<op, !cast<SOP1_Pseudo>(NAME)>,
- Select_gfx10<!cast<SOP1_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOP1_Pseudo>(NAME);
+ def _gfx10 : SOP1_Real<op, ps>,
+ Select_gfx10<ps.Mnemonic>;
}
defm S_ANDN1_SAVEEXEC_B64 : SOP1_Real_gfx10<0x037>;
@@ -1472,8 +1473,9 @@ defm S_MOVRELSD_2_B32 : SOP1_Real_gfx10<0x049>;
multiclass SOP1_Real_gfx6_gfx7<bits<8> op> {
- def _gfx6_gfx7 : SOP1_Real<op, !cast<SOP1_Pseudo>(NAME)>,
- Select_gfx6_gfx7<!cast<SOP1_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOP1_Pseudo>(NAME);
+ def _gfx6_gfx7 : SOP1_Real<op, ps>,
+ Select_gfx6_gfx7<ps.Mnemonic>;
}
multiclass SOP1_Real_gfx6_gfx7_gfx10<bits<8> op> :
@@ -1534,8 +1536,9 @@ defm S_ABS_I32 : SOP1_Real_gfx6_gfx7_gfx10<0x034>;
//===----------------------------------------------------------------------===//
multiclass SOP2_Real_gfx10<bits<7> op> {
- def _gfx10 : SOP2_Real<op, !cast<SOP2_Pseudo>(NAME)>,
- Select_gfx10<!cast<SOP2_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOP2_Pseudo>(NAME);
+ def _gfx10 : SOP2_Real<op, ps>,
+ Select_gfx10<ps.Mnemonic>;
}
defm S_LSHL1_ADD_U32 : SOP2_Real_gfx10<0x02e>;
@@ -1553,8 +1556,9 @@ defm S_MUL_HI_I32 : SOP2_Real_gfx10<0x036>;
//===----------------------------------------------------------------------===//
multiclass SOP2_Real_gfx6_gfx7<bits<7> op> {
- def _gfx6_gfx7 : SOP2_Real<op, !cast<SOP_Pseudo>(NAME)>,
- Select_gfx6_gfx7<!cast<SOP_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOP_Pseudo>(NAME);
+ def _gfx6_gfx7 : SOP2_Real<op, ps>,
+ Select_gfx6_gfx7<ps.Mnemonic>;
}
multiclass SOP2_Real_gfx6_gfx7_gfx10<bits<7> op> :
@@ -1610,13 +1614,15 @@ defm S_ABSDIFF_I32 : SOP2_Real_gfx6_gfx7_gfx10<0x02c>;
//===----------------------------------------------------------------------===//
multiclass SOPK_Real32_gfx10<bits<5> op> {
- def _gfx10 : SOPK_Real32<op, !cast<SOPK_Pseudo>(NAME)>,
- Select_gfx10<!cast<SOPK_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOPK_Pseudo>(NAME);
+ def _gfx10 : SOPK_Real32<op, ps>,
+ Select_gfx10<ps.Mnemonic>;
}
multiclass SOPK_Real64_gfx10<bits<5> op> {
- def _gfx10 : SOPK_Real64<op, !cast<SOPK_Pseudo>(NAME)>,
- Select_gfx10<!cast<SOPK_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOPK_Pseudo>(NAME);
+ def _gfx10 : SOPK_Real64<op, ps>,
+ Select_gfx10<ps.Mnemonic>;
}
defm S_VERSION : SOPK_Real32_gfx10<0x001>;
@@ -1633,13 +1639,15 @@ defm S_SUBVECTOR_LOOP_END : SOPK_Real32_gfx10<0x01c>;
//===----------------------------------------------------------------------===//
multiclass SOPK_Real32_gfx6_gfx7<bits<5> op> {
- def _gfx6_gfx7 : SOPK_Real32<op, !cast<SOPK_Pseudo>(NAME)>,
- Select_gfx6_gfx7<!cast<SOPK_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOPK_Pseudo>(NAME);
+ def _gfx6_gfx7 : SOPK_Real32<op, ps>,
+ Select_gfx6_gfx7<ps.Mnemonic>;
}
multiclass SOPK_Real64_gfx6_gfx7<bits<5> op> {
- def _gfx6_gfx7 : SOPK_Real64<op, !cast<SOPK_Pseudo>(NAME)>,
- Select_gfx6_gfx7<!cast<SOPK_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOPK_Pseudo>(NAME);
+ def _gfx6_gfx7 : SOPK_Real64<op, ps>,
+ Select_gfx6_gfx7<ps.Mnemonic>;
}
multiclass SOPK_Real32_gfx6_gfx7_gfx10<bits<5> op> :
@@ -1675,21 +1683,24 @@ defm S_SETREG_IMM32_B32 : SOPK_Real64_gfx6_gfx7_gfx10<0x015>;
//===----------------------------------------------------------------------===//
multiclass SOPP_Real_32_gfx6_gfx7<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic> {
- def _gfx6_gfx7 : SOPP_Real_32<op, !cast<SOPP_Pseudo>(NAME), real_name>,
- Select_gfx6_gfx7<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
- SOPPRelaxTable<0, !cast<SOPP_Pseudo>(NAME).KeyName, "_gfx6_gfx7">;
+ defvar ps = !cast<SOPP_Pseudo>(NAME);
+ def _gfx6_gfx7 : SOPP_Real_32<op, ps, real_name>,
+ Select_gfx6_gfx7<ps.Mnemonic>,
+ SOPPRelaxTable<0, ps.KeyName, "_gfx6_gfx7">;
}
multiclass SOPP_Real_32_gfx8_gfx9<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
- def _vi : SOPP_Real_32<op, !cast<SOPP_Pseudo>(NAME), real_name>,
- Select_vi<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
- SOPPRelaxTable<0, !cast<SOPP_Pseudo>(NAME).KeyName, "_vi">;
+ defvar ps = !cast<SOPP_Pseudo>(NAME);
+ def _vi : SOPP_Real_32<op, ps, real_name>,
+ Select_vi<ps.Mnemonic>,
+ SOPPRelaxTable<0, ps.KeyName, "_vi">;
}
multiclass SOPP_Real_32_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
- def _gfx10 : SOPP_Real_32<op, !cast<SOPP_Pseudo>(NAME), real_name>,
- Select_gfx10<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
- SOPPRelaxTable<0, !cast<SOPP_Pseudo>(NAME).KeyName, "_gfx10">;
+ defvar ps = !cast<SOPP_Pseudo>(NAME);
+ def _gfx10 : SOPP_Real_32<op, ps, real_name>,
+ Select_gfx10<ps.Mnemonic>,
+ SOPPRelaxTable<0, ps.KeyName, "_gfx10">;
}
multiclass SOPP_Real_32_gfx8_gfx9_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
@@ -1703,21 +1714,24 @@ multiclass SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<bits<7> op, string real_name =
//64 bit encodings, for Relaxation
multiclass SOPP_Real_64_gfx6_gfx7<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
- def _gfx6_gfx7 : SOPP_Real_64<op, !cast<SOPP_Pseudo>(NAME), real_name>,
- Select_gfx6_gfx7<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
- SOPPRelaxTable<1, !cast<SOPP_Pseudo>(NAME).KeyName, "_gfx6_gfx7">;
+ defvar ps = !cast<SOPP_Pseudo>(NAME);
+ def _gfx6_gfx7 : SOPP_Real_64<op, ps, real_name>,
+ Select_gfx6_gfx7<ps.Mnemonic>,
+ SOPPRelaxTable<1, ps.KeyName, "_gfx6_gfx7">;
}
multiclass SOPP_Real_64_gfx8_gfx9<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
- def _vi : SOPP_Real_64<op, !cast<SOPP_Pseudo>(NAME), real_name>,
- Select_vi<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
- SOPPRelaxTable<1, !cast<SOPP_Pseudo>(NAME).KeyName, "_vi">;
+ defvar ps = !cast<SOPP_Pseudo>(NAME);
+ def _vi : SOPP_Real_64<op, ps, real_name>,
+ Select_vi<ps.Mnemonic>,
+ SOPPRelaxTable<1, ps.KeyName, "_vi">;
}
multiclass SOPP_Real_64_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
- def _gfx10 : SOPP_Real_64<op, !cast<SOPP_Pseudo>(NAME), real_name>,
- Select_gfx10<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
- SOPPRelaxTable<1, !cast<SOPP_Pseudo>(NAME).KeyName, "_gfx10">;
+ defvar ps = !cast<SOPP_Pseudo>(NAME);
+ def _gfx10 : SOPP_Real_64<op, ps, real_name>,
+ Select_gfx10<ps.Mnemonic>,
+ SOPPRelaxTable<1, ps.KeyName, "_gfx10">;
}
multiclass SOPP_Real_64_gfx8_gfx9_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
@@ -1783,18 +1797,21 @@ defm S_CBRANCH_CDBGSYS_AND_USER : SOPP_Real_With_Relaxation_gfx6_gfx7_gfx8_gfx9_
//===----------------------------------------------------------------------===//
multiclass SOPC_Real_gfx6_gfx7<bits<7> op> {
- def _gfx6_gfx7 : SOPC_Real<op, !cast<SOPC_Pseudo>(NAME)>,
- Select_gfx6_gfx7<!cast<SOPC_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOPC_Pseudo>(NAME);
+ def _gfx6_gfx7 : SOPC_Real<op, ps>,
+ Select_gfx6_gfx7<ps.Mnemonic>;
}
multiclass SOPC_Real_gfx8_gfx9<bits<7> op> {
- def _vi : SOPC_Real<op, !cast<SOPC_Pseudo>(NAME)>,
- Select_vi<!cast<SOPC_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOPC_Pseudo>(NAME);
+ def _vi : SOPC_Real<op, ps>,
+ Select_vi<ps.Mnemonic>;
}
multiclass SOPC_Real_gfx10<bits<7> op> {
- def _gfx10 : SOPC_Real<op, !cast<SOPC_Pseudo>(NAME)>,
- Select_gfx10<!cast<SOPC_Pseudo>(NAME).Mnemonic>;
+ defvar ps = !cast<SOPC_Pseudo>(NAME);
+ def _gfx10 : SOPC_Real<op, ps>,
+ Select_gfx10<ps.Mnemonic>;
}
multiclass SOPC_Real_gfx8_gfx9_gfx10<bits<7> op> :
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