[PATCH] D104069: [RISCV] Teach vsetvli insertion to remember when predecessors have same AVL and SEW/LMUL ratio if their VTYPEs otherwise mismatch.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 14 21:08:25 PDT 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:65
   VSETVLIInfo()
       : AVLImm(0), TailAgnostic(false), MaskAgnostic(false), MaskRegOp(false) {}
 
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kito-cheng wrote:
> Need init `SEWLMULRatioOnly` here.
Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104069/new/

https://reviews.llvm.org/D104069



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