[PATCH] D104156: [DAGCombine][X86][ARM] EXTRACT_SUBVECTOR(VECTOR_SHUFFLE(?,?,Mask)) -> VECTOR_SHUFFLE(EXTRACT_SUBVECTOR(?, ?), EXTRACT_SUBVECTOR(?, ?), Mask')

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri marked an inline comment as done.
lebedev.ri added inline comments.


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Comment at: llvm/test/CodeGen/X86/min-legal-vector-width.ll:1693
 ; CHECK-AVX512:       # %bb.0:
-; CHECK-AVX512-NEXT:    vpbroadcastb %xmm1, %xmm1
 ; CHECK-AVX512-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
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RKSimon wrote:
> A lot of these changes just look like we're missing something in SimplifyDemandedVectorElts tbh
Aha, D104250.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104156/new/

https://reviews.llvm.org/D104156