[PATCH] D104156: [DAGCombine][X86][ARM] EXTRACT_SUBVECTOR(VECTOR_SHUFFLE(?,?,Mask)) -> VECTOR_SHUFFLE(EXTRACT_SUBVECTOR(?, ?), EXTRACT_SUBVECTOR(?, ?), Mask')
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 14 05:59:53 PDT 2021
RKSimon added inline comments.
================
Comment at: llvm/test/CodeGen/X86/min-legal-vector-width.ll:1693
; CHECK-AVX512: # %bb.0:
-; CHECK-AVX512-NEXT: vpbroadcastb %xmm1, %xmm1
; CHECK-AVX512-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
----------------
A lot of these changes just look like we're missing something in SimplifyDemandedVectorElts tbh
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104156/new/
https://reviews.llvm.org/D104156
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