[llvm] a845dc1 - AMDGPU/GlobalISel: Remove leftover hack for argument memory sizes

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2021-06-11T13:45:25-04:00
New Revision: a845dc1e562c20db54018a121eb01970e76602db

URL: https://github.com/llvm/llvm-project/commit/a845dc1e562c20db54018a121eb01970e76602db
DIFF: https://github.com/llvm/llvm-project/commit/a845dc1e562c20db54018a121eb01970e76602db.diff

LOG: AMDGPU/GlobalISel: Remove leftover hack for argument memory sizes

Since the call lowering code now tries to respect the tablegen
reported argument types, this is no longer necessary.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
index 5e74cab3815a..911b3064e3b3 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
@@ -126,11 +126,6 @@ struct AMDGPUIncomingArgHandler : public CallLowering::IncomingValueHandler {
                             MachinePointerInfo &MPO, CCValAssign &VA) override {
     MachineFunction &MF = MIRBuilder.getMF();
 
-    // The reported memory location may be wider than the value.
-    const LLT RegTy = MRI.getType(ValVReg);
-    MemSize = std::min(static_cast<uint64_t>(RegTy.getSizeInBytes()), MemSize);
-
-    // FIXME: Get alignment
     auto MMO = MF.getMachineMemOperand(
         MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, MemSize,
         inferAlignFromPtrInfo(MF, MPO));
@@ -233,12 +228,6 @@ struct AMDGPUOutgoingArgHandler : public AMDGPUOutgoingValueHandler {
     Register ValVReg = VA.getLocInfo() != CCValAssign::LocInfo::FPExt
                            ? extendRegister(Arg.Regs[ValRegIndex], VA)
                            : Arg.Regs[ValRegIndex];
-
-    // If we extended the value type we might need to adjust the MMO's
-    // Size. This happens if ComputeValueVTs widened a small type value to a
-    // legal register type (e.g. s8->s16)
-    const LLT RegTy = MRI.getType(ValVReg);
-    MemSize = std::min(MemSize, (uint64_t)RegTy.getSizeInBytes());
     assignValueToAddress(ValVReg, Addr, MemSize, MPO, VA);
   }
 };