[PATCH] D104079: [RISCV] Use ComputeNumSignBits/MaskedValueIsZero in RISCVDAGToDAGISel::selectSExti32/selectZExti32.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 10 18:58:57 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:1352-1356
auto *C = dyn_cast<ConstantSDNode>(N.getOperand(1));
if (C && C->getZExtValue() == UINT64_C(0xFFFFFFFF)) {
Val = N.getOperand(0);
return true;
}
----------------
jrtc27 wrote:
> You could generalise this with computeKnownBits. I don't know if that is a useful thing to do or not though.
We try to favor 0xffffffff through targetShrinkDemandedConstant during DAG combine.
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https://reviews.llvm.org/D104079/new/
https://reviews.llvm.org/D104079
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