[PATCH] D104079: [RISCV] Use ComputeNumSignBits/MaskedValueIsZero in RISCVDAGToDAGISel::selectSExti32/selectZExti32.
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 10 17:53:52 PDT 2021
jrtc27 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:1341
}
- // FIXME: Should we just call computeNumSignBits here?
- if (N.getOpcode() == ISD::AssertSext &&
----------------
Narrator: yes, yes they should :)
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:1352-1356
auto *C = dyn_cast<ConstantSDNode>(N.getOperand(1));
if (C && C->getZExtValue() == UINT64_C(0xFFFFFFFF)) {
Val = N.getOperand(0);
return true;
}
----------------
You could generalise this with computeKnownBits. I don't know if that is a useful thing to do or not though.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104079/new/
https://reviews.llvm.org/D104079
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