[PATCH] D103170: [CodeGen][AArch64][SVE] Use ld1r[bhsd] for vector splat from memory

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added a comment.

I'll take a more detailed look later but structurally it looks fine to me.  I've added a comment that hopefully means we don't need the frame index limitation.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:135
+    if (Found) {
+      if (dyn_cast<FrameIndexSDNode>(Base))
+        return false;
----------------
Rather than this I think you just need to add entries for the LD1R instructions to functions like getLoadStoreImmIdx and getMemOpInfo.


Repository:
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  https://reviews.llvm.org/D103170/new/

https://reviews.llvm.org/D103170