[PATCH] D103912: LoadStoreVectorizer: support different operand orders in the add sequence match

Viacheslav Nikolaev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 8 12:30:09 PDT 2021


wvoquine updated this revision to Diff 350687.
wvoquine added a comment.

Fixed the code style issue.
Implemented operand order picking loop instead of a sequence of ifs.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103912/new/

https://reviews.llvm.org/D103912

Files:
  llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
  llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D103912.350687.patch
Type: text/x-patch
Size: 13484 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210608/adea96b0/attachment.bin>


More information about the llvm-commits mailing list