[PATCH] D103787: [RISCV] Don't enable loop vectorizer interleaving if the V extension isn't enabled.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 7 10:21:23 PDT 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8c6bd6c22f38: [RISCV] Don't enable loop vectorizer interleaving if the V extension isn't… (authored by craig.topper).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103787/new/
https://reviews.llvm.org/D103787
Files:
llvm/lib/Target/RISCV/RISCVSubtarget.h
Index: llvm/lib/Target/RISCV/RISCVSubtarget.h
===================================================================
--- llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -135,7 +135,9 @@
assert(i < RISCV::NUM_TARGET_REGS && "Register out of range");
return UserReservedRegister[i];
}
- unsigned getMaxInterleaveFactor() const { return MaxInterleaveFactor; }
+ unsigned getMaxInterleaveFactor() const {
+ return hasStdExtV() ? MaxInterleaveFactor : 1;
+ }
protected:
// GlobalISel related APIs.
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