[PATCH] D103510: [RISCV] Use vmv.v.[v|i] if we know COPY is under the same vl and vtype.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 4 21:00:21 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:167
+ // If the vsetvli is tail undisturbed, keep the whole register move.
+ if (!RISCVVType::isTailAgnostic(VType))
+ return false;
----------------
craig.topper wrote:
> What if the defining instruction something that doesn't obey vsetvli for example an earlier COPY that became a whole register move. Or a whole register load which could be a spill reload or just a VLMAX load.
>
> Or a reduction which only writes element 0 regardless of the tail policy. I think we currently force tail agnostic on the vsetvli for those, but I might update it to keep whatever tail policy the previous instruction used.
Looks like I was wrong about reductions. The behavior changed after 0.9 and our implementation is incorrectly forcing tail agnostic for those.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103510/new/
https://reviews.llvm.org/D103510
More information about the llvm-commits
mailing list