[PATCH] D103299: [RISCV] Teach vsetvli insertion pass that operations on masks don't care about SEW/LMUL.

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 4 06:38:43 PDT 2021

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frasercrmck accepted this revision.
frasercrmck added a comment.
This revision is now accepted and ready to land.

LGTM, thanks


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D103299/new/

https://reviews.llvm.org/D103299

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