[PATCH] D103659: [AMDGPU][GlobalISel] Try to use op_sel when selecting packed instructions

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3341
+// register.
+static bool isHiElt(Register Src, Register &OutSrc,
+                    const MachineRegisterInfo &MRI, bool &FNeg) {
----------------
Return OutSrc, or NoRegister on failure?


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3359-3360
+
+  if (MI->getOpcode() != AMDGPU::G_TRUNC && MI->getOpcode() != AMDGPU::G_LSHR)
+    return false;
+
----------------
This seems redundant.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3412
+// LoSrcOut and HiSrcOut.
+static bool isBuildVectorTrunc(MachineInstr *MI, Register &LoSrcOut,
+                               Register &HiSrcOut,
----------------
Could return a std::pair of Registers, or {NoRegister,NoRegister} on failure. But I'm not sure if that would be cleaner.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3416
+  // Strip G_BITCAST
+  Register Src = MI->getOperand(1).getReg();
+  MI = MRI.getVRegDef(Src);
----------------
Assert that we're looking at a G_BITCAST before doing this.


Repository:
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  https://reviews.llvm.org/D103659/new/

https://reviews.llvm.org/D103659