[PATCH] D103659: [AMDGPU][GlobalISel] Try to use op_sel when selecting packed instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3327
+// OutSrc. If any G_FNEG were encountered, xor the value in FNeg.
+static void stripBitcastAndFNeg(Register Src, Register &OutSrc,
+                                const MachineRegisterInfo &MRI, bool &FNeg) {
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I would prefer to return the new register value instead of using the out argument


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3348-3349
+  // Strip EXT instructions
+  if (MI->getOpcode() == AMDGPU::G_ANYEXT ||
+      MI->getOpcode() == AMDGPU::G_ZEXT || MI->getOpcode() == AMDGPU::G_SEXT) {
+    Src = MI->getOperand(1).getReg();
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I don't think this is valid because it changes the bit position of the fneg


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D103659/new/

https://reviews.llvm.org/D103659