[PATCH] D103174: RISCV: honour `.option relax` in assembly
Saleem Abdulrasool via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 2 09:59:20 PDT 2021
compnerd marked 2 inline comments as done.
compnerd added inline comments.
================
Comment at: llvm/test/MC/RISCV/scoped-relaxation.s:3
+
+ .global function
+
----------------
jrtc27 wrote:
> Don't indent any of these, it just makes the test look ugly.
I think that we can disagree then. I think that it is far more legible than everything being 0-column aligned. FWIW, most of the other backends do use the indentation (particularly the ones that I've worked with in LLVM in the past - ARM, ARM64, X86, and by extension X86_64).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103174/new/
https://reviews.llvm.org/D103174
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