[PATCH] D103291: [AArch64][GISel] and+or+shl => bfi

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 28 14:07:33 PDT 2021


aemerson accepted this revision.
aemerson added a comment.
This revision is now accepted and ready to land.

LGTM with minor nits addressed, thanks.



================
Comment at: llvm/test/CodeGen/AArch64/GlobalISel/select-bitfield-insert.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -o - -verify-machineinstrs -global-isel | FileCheck %s --check-prefixes=CHECK,GISEL
----------------
paquette wrote:
> jroelofs wrote:
> > paquette wrote:
> > > Is it possible to use a MIR testcase instead?
> > IIUC, a MIR test case wouldn't show that we're doing as well as (and in some cases better than) SDAG, but I'm happy to convert it if you think that doesn't matter so much.
> Ah, okay, I see. I think it's fine either way.
I'm ok with either kind of test, the .ll tests do have an advantage in that its easier to see what the semantics of the generated code are.

Should probably add -global-isel-abort=1 to the test though.


Repository:
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  https://reviews.llvm.org/D103291/new/

https://reviews.llvm.org/D103291



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