[PATCH] D99355: Implementation of intrinsic and SDNode definitions for VP load, store, gather, scatter.
Simon Moll via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 27 05:05:26 PDT 2021
simoll added a comment.
In D99355#2781282 <https://reviews.llvm.org/D99355#2781282>, @frasercrmck wrote:
> I had a thought about alignment. Do we have a plan on how to deal with unaligned accesses?
Not yet
> The other non-VP masked intrinsics are scalarized by the `ScalarizeMaskedMemIntrin` pass and regular loads and stores are handled by -- I believe -- `LegalizeDAG`.
Maybe vp can piggyback on `ScalarizeMaskedMemIntrin` for unaligned access expansion.
> This doesn't apply for scalable vectors, where presumably the onus is on the author/compiler transform not to emit them in the first place. But then for that we have TTI methods like `isLegalMaskedStore` and friends.
`ScalarizeMaskedMemIntrin` could use llvm.experimental.vector.extract <https://llvm.org/docs/LangRef.html#id2517> to do the same for scalable vectors...
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