[PATCH] D102521: [RISCV] Optimize SEW=64 shifts by splat on RV32.

[Craig Topper via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG9065118b6463: [RISCV] Optimize SEW=64 shifts by splat on RV32. (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102521/new/

https://reviews.llvm.org/D102521

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll

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