[PATCH] D102739: [RISCV] Enable cross basic block aware vsetvli insertion
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 26 09:26:39 PDT 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1b47a3de48d2: [RISCV] Enable cross basic block aware vsetvli insertion (authored by craig.topper).
Changed prior to commit:
https://reviews.llvm.org/D102739?vs=347850&id=347996#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D102739/new/
https://reviews.llvm.org/D102739
Files:
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
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