[PATCH] D102938: [AArch64] Generate LD1 for anyext i8 or i16 vector load

[Andrew Savonichev via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8ac66d61eab3: [AArch64] Generate LD1 for anyext i8 or i16 vector load (authored by asavonic).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102938/new/

https://reviews.llvm.org/D102938

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
  llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
  llvm/test/CodeGen/AArch64/ssub_sat_vec.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D102938.347923.patch
Type: text/x-patch
Size: 10827 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210526/96997cc9/attachment.bin>