[PATCH] D102521: [RISCV] Optimize SEW=64 shifts by splat on RV32.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 24 09:47:02 PDT 2021
craig.topper added a comment.
In D102521#2777262 <https://reviews.llvm.org/D102521#2777262>, @frasercrmck wrote:
> I probably don't have the full picture here, but I was wondering if there was a generic "simplify demanded bits" we could hook this node into, since presumably LLVM already knows that only those bits of the shift are used. Does `SimplifyDemandedBitsForTargetNode` not apply here?
I think for generic shift, nodes llvm considers all bits of the shift amount to be demanded. It's not generally safe because not all targets have shift instructions that modulo the shift amount.
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