[PATCH] D102925: [RISCV] Add wrong arch attribute objfile test.

Zakk Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun May 23 21:18:54 PDT 2021


khchen added a comment.

clang or clang+llc your test with my patch the arch attribute is still `rv64i2p0`, does it break your use cases?

I found <https://clang.llvm.org/docs/AttributeReference.html#id288> the iFunc definition always in the declared entity in generated IR, 
and it seems target-feature attribute for RISCVAsmPrinter comes from the first in function sequence,
so RISCVAsmPrinter would take the ifunc's target-feature to initialize STI.
(https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp#L172)

> 1. Each module records its -march= string and those get combined for the attributes section

Need to handle something like linking two bitcodes with different module march string, or string is empty in older bitcode.
I think maybe we could just compute the combination march in RISCVAsmPrinter..
I could do it in another patch when I have time.

I want to say again, this patch just want to fix a problem based on current approach, 
that RISCVAsmPrinter reads the target-feature to do something, but current behavior is emitting the arch attribute before read it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102925/new/

https://reviews.llvm.org/D102925



More information about the llvm-commits mailing list