[PATCH] D102737: [RISCV] Add a vsetvli insert pass that can be extended to be aware of incoming VL/VTYPE from other basic blocks.
    Hsiangkai Wang via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Sat May 22 01:10:32 PDT 2021
    
    
  
HsiangKai added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:272
+  // If we haven't already set the initial requirements for the block we
+  // don't need to ass the requirements start form this explicit vsetvli.
+  VSETVLIInfo NewInfo;
----------------
"ask" the requirements start "from" this ...?
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102737/new/
https://reviews.llvm.org/D102737
    
    
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