[PATCH] D102737: [RISCV] Add a vsetvli insert pass that can be extended to be aware of incoming VL/VTYPE from other basic blocks.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:317
+  BlockData &BBInfo = BlockInfo[MBB.getNumber()];
+  // RequirePending is used to indicate whether we are collecting the initial
+  // requirements for the block.
----------------
rogfer01 wrote:
> Not sure what this `RequirePending` refers to?
At one point I was using AMDGPUs SIModeRegister pass as a reference for this cross basic block stuff and that got copied from there before I realized I didn't need it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102737/new/

https://reviews.llvm.org/D102737