[llvm] e81f09f - [InstCombine] add tests for funnel shift miscompile; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-05-18T13:18:39-04:00
New Revision: e81f09f8f880dc54ab6a460aa7591e9615bac222

URL: https://github.com/llvm/llvm-project/commit/e81f09f8f880dc54ab6a460aa7591e9615bac222
DIFF: https://github.com/llvm/llvm-project/commit/e81f09f8f880dc54ab6a460aa7591e9615bac222.diff

LOG: [InstCombine] add tests for funnel shift miscompile; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/funnel.ll
    llvm/test/Transforms/InstCombine/rotate.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/funnel.ll b/llvm/test/Transforms/InstCombine/funnel.ll
index 42e289f8de76c..a064b6f1df834 100644
--- a/llvm/test/Transforms/InstCombine/funnel.ll
+++ b/llvm/test/Transforms/InstCombine/funnel.ll
@@ -353,3 +353,56 @@ define <2 x i64> @fshl_select_vector(<2 x i64> %x, <2 x i64> %y, <2 x i64> %sham
   %r = select <2 x i1> %cmp, <2 x i64> %y, <2 x i64> %or
   ret <2 x i64> %r
 }
+
+define i8 @unmasked_shlop_unmasked_shift_amount(i32 %x, i32 %y, i32 %shamt) {
+; CHECK-LABEL: @unmasked_shlop_unmasked_shift_amount(
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[SHAMT:%.*]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = trunc i32 [[Y:%.*]] to i8
+; CHECK-NEXT:    [[T8:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP2]], i8 [[TMP3]], i8 [[TMP1]])
+; CHECK-NEXT:    ret i8 [[T8]]
+;
+  %masky = and i32 %y, 255
+  %t4 = sub i32 8, %shamt
+  %t5 = shl i32 %x, %t4
+  %t6 = lshr i32 %masky, %shamt
+  %t7 = or i32 %t5, %t6
+  %t8 = trunc i32 %t7 to i8
+  ret i8 %t8
+}
+
+define i8 @unmasked_shlop_insufficient_mask_shift_amount(i16 %x, i16 %y, i16 %shamt) {
+; CHECK-LABEL: @unmasked_shlop_insufficient_mask_shift_amount(
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i16 [[SHAMT:%.*]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i16 [[Y:%.*]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = trunc i16 [[X:%.*]] to i8
+; CHECK-NEXT:    [[T8:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP2]], i8 [[TMP3]], i8 [[TMP1]])
+; CHECK-NEXT:    ret i8 [[T8]]
+;
+  %shm = and i16 %shamt, 15
+  %maskx = and i16 %x, 255
+  %t4 = sub i16 8, %shm
+  %t5 = shl i16 %y, %t4
+  %t6 = lshr i16 %maskx, %shm
+  %t7 = or i16 %t5, %t6
+  %t8 = trunc i16 %t7 to i8
+  ret i8 %t8
+}
+
+define i8 @unmasked_shlop_masked_shift_amount(i16 %x, i16 %y, i16 %shamt) {
+; CHECK-LABEL: @unmasked_shlop_masked_shift_amount(
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i16 [[SHAMT:%.*]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i16 [[Y:%.*]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = trunc i16 [[X:%.*]] to i8
+; CHECK-NEXT:    [[T8:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP2]], i8 [[TMP3]], i8 [[TMP1]])
+; CHECK-NEXT:    ret i8 [[T8]]
+;
+  %shm = and i16 %shamt, 7
+  %maskx = and i16 %x, 255
+  %t4 = sub i16 8, %shm
+  %t5 = shl i16 %y, %t4
+  %t6 = lshr i16 %maskx, %shm
+  %t7 = or i16 %t5, %t6
+  %t8 = trunc i16 %t7 to i8
+  ret i8 %t8
+}

diff  --git a/llvm/test/Transforms/InstCombine/rotate.ll b/llvm/test/Transforms/InstCombine/rotate.ll
index b0e80192809b7..443d0c5fba61c 100644
--- a/llvm/test/Transforms/InstCombine/rotate.ll
+++ b/llvm/test/Transforms/InstCombine/rotate.ll
@@ -936,3 +936,20 @@ define i32 @rotateright32_doubleand1(i32 %v, i16 %r) {
   %or = or i32 %shr, %shl
   ret i32 %or
 }
+
+define i8 @unmasked_shlop_unmasked_shift_amount(i32 %x, i32 %shamt) {
+; CHECK-LABEL: @unmasked_shlop_unmasked_shift_amount(
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[SHAMT:%.*]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = trunc i32 [[X]] to i8
+; CHECK-NEXT:    [[T8:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP2]], i8 [[TMP3]], i8 [[TMP1]])
+; CHECK-NEXT:    ret i8 [[T8]]
+;
+  %maskx = and i32 %x, 255
+  %t4 = sub i32 8, %shamt
+  %t5 = shl i32 %x, %t4
+  %t6 = lshr i32 %maskx, %shamt
+  %t7 = or i32 %t5, %t6
+  %t8 = trunc i32 %t7 to i8
+  ret i8 %t8
+}