[llvm] f4c0fdc - [AMDGPU] Set unused dst_sel to '?' in the encoding

[Stanislav Mekhanoshin via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2021-05-17T08:38:52-07:00
New Revision: f4c0fdc6c9db616e2a50e3b39c615f972b4b3158

URL: https://github.com/llvm/llvm-project/commit/f4c0fdc6c9db616e2a50e3b39c615f972b4b3158
DIFF: https://github.com/llvm/llvm-project/commit/f4c0fdc6c9db616e2a50e3b39c615f972b4b3158.diff

LOG: [AMDGPU] Set unused dst_sel to '?' in the encoding

This is to allow disasm with any bits in the unused fields.

Differential Revision: https://reviews.llvm.org/D102526

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VOPInstructions.td
    llvm/test/MC/Disassembler/AMDGPU/sdwa_gfx9.txt
    llvm/test/MC/Disassembler/AMDGPU/sdwa_vi.txt

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/VOPInstructions.td b/llvm/lib/Target/AMDGPU/VOPInstructions.td
index 554d2462fa1d..44c04561c38e 100644
--- a/llvm/lib/Target/AMDGPU/VOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOPInstructions.td
@@ -417,8 +417,8 @@ class VOP_SDWAe<VOPProfile P> : Enc64 {
   bits<1> clamp;
 
   let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
-  let Inst{42-40} = !if(P.EmitDstSel, dst_sel{2-0}, 0);
-  let Inst{44-43} = !if(P.EmitDstSel, dst_unused{1-0}, 0);
+  let Inst{42-40} = !if(P.EmitDstSel, dst_sel{2-0}, ?);
+  let Inst{44-43} = !if(P.EmitDstSel, dst_unused{1-0}, ?);
   let Inst{45}    = !if(P.HasSDWAClamp, clamp{0}, 0);
   let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, 0);
   let Inst{51}    = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
@@ -468,8 +468,8 @@ class VOP_SDWA9Ae<VOPProfile P> : VOP_SDWA9e<P> {
   bits<1> clamp;
   bits<2> omod;
 
-  let Inst{42-40} = !if(P.EmitDstSel, dst_sel{2-0}, 0);
-  let Inst{44-43} = !if(P.EmitDstSel, dst_unused{1-0}, 0);
+  let Inst{42-40} = !if(P.EmitDstSel, dst_sel{2-0}, ?);
+  let Inst{44-43} = !if(P.EmitDstSel, dst_unused{1-0}, ?);
   let Inst{45}    = !if(P.HasSDWAClamp, clamp{0}, 0);
   let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0);
 }

diff  --git a/llvm/test/MC/Disassembler/AMDGPU/sdwa_gfx9.txt b/llvm/test/MC/Disassembler/AMDGPU/sdwa_gfx9.txt
index 02d7a32f696e..54fbd17ad92d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/sdwa_gfx9.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/sdwa_gfx9.txt
@@ -448,6 +448,12 @@
 # GFX9: v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0 ; encoding: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x02,0x04]
 0xf9 0x04 0x22 0x7c 0x01 0x00 0x02 0x04
 
+# GFX9: v_cmp_lt_f32_sdwa vcc, v2, v4 src0_sel:BYTE_1 src1_sel:DWORD ; encoding: [0xf9,0x08,0x82,0x7c,0x02,0x00,0x01,0x06]
+0xf9,0x08,0x82,0x7c,0x02,0x00,0x01,0x06
+
+# GFX9: v_cmp_lt_f32_sdwa vcc, v2, v4 src0_sel:BYTE_1 src1_sel:DWORD ; encoding: [0xf9,0x08,0x82,0x7c,0x02,0x00,0x01,0x06]
+0xf9,0x08,0x82,0x7c,0x02,0x06,0x01,0x06
+
 #-----------------------------------------------------------------------------#
 # Modifiers
 #-----------------------------------------------------------------------------#

diff  --git a/llvm/test/MC/Disassembler/AMDGPU/sdwa_vi.txt b/llvm/test/MC/Disassembler/AMDGPU/sdwa_vi.txt
index 1071da07dd82..f2cc73f67e30 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/sdwa_vi.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/sdwa_vi.txt
@@ -368,3 +368,9 @@
 
 # VI: v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x00,0x01,0x00,0x06,0x06]
 0xf9,0x04,0x0a,0x00,0x01,0x00,0x06,0x06
+
+# VI: v_cmp_lt_f32 vcc, v2, v4 src0_sel:BYTE_1 src1_sel:DWORD ; encoding: [0xf9,0x08,0x82,0x7c,0x02,0x00,0x01,0x06]
+0xf9,0x08,0x82,0x7c,0x02,0x00,0x01,0x06
+
+# VI: v_cmp_lt_f32 vcc, v2, v4 src0_sel:BYTE_1 src1_sel:DWORD ; encoding: [0xf9,0x08,0x82,0x7c,0x02,0x00,0x01,0x06]
+0xf9,0x08,0x82,0x7c,0x02,0x06,0x01,0x06