[PATCH] D102620: [ARM] Fix the operand used for WLS in ARMLowOverheadLoops

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: samtebbs, SjoerdMeijer, ostannard, simon_tatham.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.

The Loop start instruction handled by the ARMLowOverheadLoops are:
$lr = t2DoLoopStart $r0
$lr = t2DoLoopStartTP $r1, $r0
$lr = t2WhileLoopStartLR $r0, %bb, implicit-def dead $cpsr
All three of these will have LR as the 0 argument, the trip count as the 1 argument.

This patch updated a few places in ARMLowOverheadLoops where the 0th arg was being used for t2WhileLoopStartLR instructions as the trip count. One place was entirely removed as i does not seem valid any more, the case the code is trying to protect against should not be able to occur with our correct-by-construction low overhead loops.


https://reviews.llvm.org/D102620

Files:
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-chain-store.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
  llvm/test/CodeGen/Thumb2/mve-memtp-loop.ll

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